BQ24188_15 Datasheet, PDF (6/52 Pages) Texas Instruments – bq24188 2A, 30V, Host-Controlled Single-Input, Single Cell Switchmode Li-Ion Battery Charger with Power Path Management and USB-OTG Support

bq24188
SLUSC44A – DECEMBER 2014 – REVISED MAY 2015
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8.4 Thermal Information
THERMAL METRIC⁽¹⁾
bq24188
YFF
(36 PINS)
RGE
(24 PINS)
UNIT
R_θJA
R_θJCtop
R_θJB
ψ_JT
ψ_JB
R_θJCbot
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
55.8
32.6
0.5
30.5
10
3.3
°C/W
2.6
0.4
9.9
9.3
N/A
2.6
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
8.5 Electrical Characteristics
Circuit of Figure 7, V_UVLO < V_IN < V_OVP AND V_IN > V_BAT+ V_SLP, T_J = –40°C to 125°C and T_J = 25°C for typical values (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENTS
V_UVLO < V_IN < V_OVP and V_IN>V_BAT+V_SLP
15
PWM switching
YFF Package: V_UVLO < V_IN < V_OVP and _VIN>V_BAT+V_SLP
I_IN
Supply current for control
PWM NOT switching
RGE Package: V_UVLO < V_IN < V_OVP and _VIN>V_BAT+V_SLP
PWM NOT switching
6.5
mA
6.65
I_{BAT_HIZ}
Battery discharge current in
High Impedance mode, (BAT,
SW, SYS)
0°C< T_J < 85°C, V_IN = 5V, High-Z Mode
0°C< T_J < 85°C, V_BAT = 4.2 V, V_IN = 5V,
SCL, SDA = 0V or 1.8V, High-Z Mode
YFF Package: 0°C< T_J < 85°C, V_BAT = 4.2 V, V_IN = 0V,
SCL, SDA = 0V or 1.8V
RGE Package: 0°C< T_J < 85°C, V_BAT = 4.2 V, V_IN = 0V,
SCL, SDA = 0V or 1.8V
250
μA
15
77
μA
80
POWER-PATH MANAGEMENT
V_SYSREG(LO)
System Regulation Voltage
V_BAT < V_MINSYS
V_MINSYS
V_MINSYS
V_MINSYS
V
+ 80mV + 100mV + 120mV
V_SYSREG(HI)
V_MINSYS
System Regulation Voltage
Minimum System Voltage
Regulation Threshold
Battery FET turned off, no charging,
V_BAT > 3.5V
V_BAT + V_{DO(SYS_BAT)} < 3.5V
V_BATREG
V_BATREG
V_BATREG
V
+1.4% +1.6% +1.77%
3.44
3.5
3.55
V
t_{DGL(MINSYS_CMP)}
Deglitch time, VMINSYS
comparator rising
8
ms
V_BSUP1
Enter supplement mode
threshold
V_BAT > V_BUVLO
V_BAT –
20mV
V
V_BSUP2
Exit supplement mode
threshold
V_BAT > V_BUVLO
V_BAT –
5mV
V
I_LIM(DISCH)
Current Limit, Discharge or
Supplement Mode⁽¹⁾
V_LIM(BGATE) = V_BAT – V_SYS
6
9
A
t_DGL(SC1)
Deglitch Time, OUT Short
Circuit during Discharge or
Supplement Mode
Measured from I_BAT = 7A to FET off
250
μs
t_REC(SC1)
Recovery time, OUT Short
Circuit during Discharge or
Supplement Mode
2
s
Battery Range for BGATE
Operation
2.5
4.5
V
(1) Continuous and periodic pulse currents from BAT to SYS are limited by output current specifications in the Absolute Maximum Ratings
table.
6
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