BQ24188_15 Datasheet, PDF (42/52 Pages) Texas Instruments – bq24188 2A, 30V, Host-Controlled Single-Input, Single Cell Switchmode Li-Ion Battery Charger with Power Path Management and USB-OTG Support

bq24188
SLUSC44A – DECEMBER 2014 – REVISED MAY 2015
12 Layout
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12.1 Layout Guidelines
The following provides some guidelines:
• Place 1µF input capacitor as close to PMID terminal and PGND terminal as possible to make high frequency
current loop area as small as possible.
• Connect the GND of the PMID and IN caps as close as possible.
• Place 4.7µF input capacitor as close to IN terminal and PGND terminal as possible to make high frequency
current loop area as small as possible.
• The local bypass capacitor from SYS to GND should be connected between the SYS terminal and PGND of
the IC. The intent is to minimize the current path loop area from the SW terminal through the LC filter and
back to the PGND terminal.
• Place all decoupling capacitors close to their respective IC terminal and as close as to PGND as possible. Do
not place components such that routing interrupts power stage currents. All small control signals should be
routed away from the high current paths.
• The PCB should have a ground plane (return) connected directly to the return of all components through vias.
Two vias per capacitor for power-stage capacitors and one via per capacitor for small-signal components. It is
also recommended to put vias inside the PGND pads for the IC, if possible. A star ground design approach is
typically used to keep circuit block currents isolated (high-power/low-power small-signal) which reduces noise-
coupling and ground-bounce issues. A single ground plane for this design gives good results.
• The high-current charge paths into IN, BAT, SYS and from the SW terminals must be sized appropriately for
the maximum charge current in order to avoid voltage drops in these traces. The PGND terminals should be
connected to the ground plane to return current through the internal low-side FET.
• For high-current applications, the balls for the power paths should be connected to as much copper in the
board as possible. This allows better thermal performance as the board pulls heat away from the IC.
12.2 Layout Example
It is important to pay special attention to the PCB layout. Figure 42 provides a sample layout for the high current
paths of the bq24188YFF. Figure 43 provides a sample layout for the high current paths of the bq24188RGE.
PMID
PMID and IN
Cap Gnds
close together
PGND
IN cap close
to IN pin
SW
BOOT
Thermal vias
connect to
PGND
SYS cap
close to
SYS pins
BAT cap close
to BAT pins
Figure 42. Recommended bq24188 PCB Layout for WCSP Package
sp
42
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