OMAP5912ZZG Datasheet, PDF (82/269 Pages) Texas Instruments – This data sheet revision history highlights the technical changes made to SPRS231D to generate SPRS231E

Introduction
Table 2−5. Signal Descriptions (Continued)
SIGNAL
ZDY/
GDY
BALL#
ZZG
BALL#
DESCRIPTION
TYPE^†
EXTERNAL MEMORY INTERFACE SLOW (EMIFS) FLASH AND ASYNCHRONOUS MEMORY INTERFACE
FLASH.A[25:1]
F3 J4
E1 L7 EMIFS address bus. Address output bus for all EMIFS accesses.
O
J2 H2
K3 K4
H5 F4
L8 F2
H4 H3
J3 J4
G6 G5
J2 K7
G2 G4
H3 H4
G3 F5
K8 G2
F1 F2
G3 G4
E1 D1
F3 J7
E2 C1
E3 F4
D2 E3
D2 E4
E4 C2
C1 D3
D3
J8
FLASH.D[15:0]
N4 R1
P1 K7
M3 M4
N2 L5
N1 K6
L4 M2
J7 L2
M1 L1
V3 T4 EMIFS data bus. Bidirectional 16-bit data bus used to transfer read and write I/O
U3 U1 data during EMIFS accesses.
P8 T3 The 16-bit data bus becomes address/data in case the EMIFS is configured
T2 R4 in address/data multiplexed mode.
R3 R2
P7 P4
P2 N7
N2 N4
FLASH.CLK
K1
N3
Flash clock. Clock output that is active during synchronous modes of flash
O
operation for synchronous burst flash memories.
FLASH.RDY
L6
V2
Flash ready. Active-high ready input used to suspend the flash interface
I
when the external memory or asynchronous device is not ready to continue
the current cycle.
FLASH.ADV
H6
L4
Flash address valid. Active-low control signal used to indicate a valid
O
address is present on the FLASH.A[25:1] bus.
FLASH.BAA
J8
M4
Flash burst advance acknowledge. Active-low control signal used with
O
Advanced Micro Devices E burst flash.
FLASH.BE[1:0]
K2 J1
M8 L3 Flash byte enables. Active-low byte enable signals used to perform
O
byte-wide accesses to memories or devices that support byte enables.
FLASH.CS0
J5
M7
Flash chip-select bit 0
O
FLASH.CS1
J3
M3
Flash chip-select bit 1
O
FLASH.CS1L
J3
M3
Lower half of FLASH.CS1 address range
O
FLASH.CS1U
T1
Y1
Upper half of FLASH.CS1 address range
O
FLASH.CS2
J8
M4
Flash chip-select bit 2
O
FLASH.CS2L
J8
M4
Lower half of FLASH.CS2 address range
O
FLASH.CS2U
K3
P3
Upper half of FLASH.CS2 address range
O
FLASH.CS2UOE
J1
L3
FLASH.CS2U gated with FLASH.OE. Output enable if EMIFS is used to
O
K1
N3
interface with external flash.
FLASH.CS2UWE
K2
M8
FLASH.CS2U gated with FLASH.WE. Write enable if EMIFS is used to
O
N3
W1
interface with external flash.
FLASH.CS3
J6
N8
Flash chip-select bit 3. If MPU_BOOT is high and the device is an emulation
O
device, select external boot memory.
† _{I = Input, O = Output, Z = High-Impedance}
‡ _{GPIO13 is used to select between full and fast boot. Set GPIO13 high to boot from the USB peripheral. Set GPIO13 low to boot from external}
flash on CS3.
Advanced Micro Devices is a trademark of Advanced Micro Devices, Inc.
82 SPRS231E
December 2003 − Revised December 2005