OMAP5912ZZG Datasheet, PDF (115/269 Pages) Texas Instruments – This data sheet revision history highlights the technical changes made to SPRS231D to generate SPRS231E

Functional Overview
Table 3−11. System DMA Controller Registers (Continued)
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS ACCESS
WIDTH TYPE
RESET
VALUE
FFFE:D9A0 SYS_DMA_COLOR_L_CH6
Logical Channel 6 Color Parameter Register,
Lower Bits
16
RW undef
FFFE:D9A2 SYS_DMA_COLOR_U_CH6
Logical Channel 6 Color Parameter Register,
Upper Bits
16
RW undef
FFFE:D9A4 SYS_DMA_CCR2
Channel Control Register 2
16
RW undef
FFFE:D9A8 SYS_DMA_CLNK_CTRL
Channel Link Control Register
16
RW undef
FFFE:D9AA SYS_DMA_LCH_CTRL
Logical Channel Control Register
16
RW undef
FFFE:D9AC −
FFFE:D9BF
Reserved
FFFE:D9C0 SYS_DMA_CSDP_CH7
Logical Channel 7 Source/Destination
Parameters Register
16
RW 0000h
FFFE:D9C2 SYS_DMA_CCR_CH7
Logical Channel 7 Control Register
16
RW 0000h
FFFE:D9C4 SYS_DMA_CICR_CH7
Logical Channel 7 Interrupt Control Register
16
RW 0003h
FFFE:D9C6 SYS_DMA_CSR_CH7
Logical Channel 7 Status Register
16
R
0000h
FFFE:D9C8 SYS_DMA_CSSA_L_CH7
Logical Channel 7 Source Start Address
Register LSB
16
RW undef
FFFE:D9CA SYS_DMA_CSSA_U_CH7
Logical Channel 7 Source Start Address
Register MSB
16
RW undef
FFFE:D9CC SYS_DMA_CDSA_L_CH7
Logical Channel 7 Destination Start Address
Register LSB
16
RW undef
FFFE:D9CE SYS_DMA_CDSA_U_CH7
Logical Channel 7 Destination Start Address
Register MSB
16
RW undef
FFFE:D9D0 SYS_DMA_CEN_CH7
Logical Channel 7 Element Number Register
16
RW undef
FFFE:D9D2 SYS_DMA_CFN_CH7
Logical Channel 7 Frame Number Register
16
RW undef
FFFE:D9D4 SYS_DMA_CSFI_CH7
Logical Channel 7 Source Frame Index
Register
16
RW undef
FFFE:D9D6 SYS_DMA_CSEI_CH7
Logical Channel 7 Source Element Index
Register
16
RW undef
FFFE:D9D8 SYS_DMA_CSAC_CH7
Logical Channel 7 Source Address Counter
Register
16
R
undef
FFFE:D9DA SYS_DMA_CDAC_CH7
Logical Channel 7 Destination Address
Counter Register
16
R
undef
FFFE:D9DC SYS_DMA_CDEI_CH7
Logical Channel 7 Destination Element Index
Register
16
RW undef
FFFE:D9DE SYS_DMA_CDFI_CH7
Logical Channel 7 Destination Frame Index
Register
16
RW undef
FFFE:D9E0 SYS_DMA_COLOR_L_CH7
Logical Channel 7 Color Parameter Register,
Lower Bits
16
RW undef
FFFE:D9E2 SYS_DMA_COLOR_U_CH7
Logical Channel 7 Color Parameter Register,
Upper Bits
16
RW undef
FFFE:D9E4 SYS_DMA_CCR2
Channel Control Register 2
16
RW undef
FFFE:D9E8 SYS_DMA_CLNK_CTRL
Channel Link Control Register
16
RW undef
FFFE:D9EA SYS_DMA_LCH_CTRL
Logical Channel Control Register
16
RW undef
FFFE:D9EC −
FFFE:D9FF
Reserved
FFFE:DA00 SYS_DMA_CSDP_CH8
Logical Channel 8 Source/Destination
Parameters Register
16
RW 0000h
FFFE:DA02 SYS_DMA_CCR_CH8
Logical Channel 8 Control Register
16
RW 0000h
December 2003 − Revised December 2005
SPRS231E 115