OMAP5912ZZG Datasheet, PDF (107/269 Pages) Texas Instruments – This data sheet revision history highlights the technical changes made to SPRS231D to generate SPRS231E

Functional Overview
BYTE
ADDRESS
FFFE:0048
FFFE:004C
FFFE:0050
FFFE:0054
FFFE:0058
FFFE:005C
FFFE:0060
FFFE:0064
FFFE:0068
FFFE:006C
FFFE:0070
FFFE:0074
FFFE:0078
FFFE:007C
FFFE:0080
FFFE:0084
FFFE:0088
FFFE:008C
FFFE:0090
FFFE:0094
FFFE:0098
FFFE:009C
FFFE:00A0
FFFE:00A4
FFFE:00A8
Table 3−3. MPU Level 2 Interrupt Handler Registers (Continued)
REGISTER NAME
DESCRIPTION
ACCESS ACCESS
WIDTH TYPE
RESET
VALUE
MPU_L2_ILR11
Interrupt Priority Level For IRQ 11 Register
32
R/W 0000 0000h
MPU_L2_ILR12
Interrupt Priority Level For IRQ 12 Register
32
R/W 0000 0000h
MPU_L2_ILR13
Interrupt Priority Level For IRQ 13 Register
32
R/W 0000 0000h
MPU_L2_ILR14
Interrupt Priority Level For IRQ 14 Register
32
R/W 0000 0000h
MPU_L2_ILR15
Interrupt Priority Level For IRQ 15 Register
32
R/W 0000 0000h
MPU_L2_ILR16
Interrupt Priority Level For IRQ 16 Register
32
R/W 0000 0000h
MPU_L2_ILR17
Interrupt Priority Level For IRQ 17 Register
32
R/W 0000 0000h
MPU_L2_ILR18
Interrupt Priority Level For IRQ 18 Register
32
R/W 0000 0000h
MPU_L2_ILR19
Interrupt Priority Level For IRQ 19 Register
32
R/W 0000 0000h
MPU_L2_ILR20
Interrupt Priority Level For IRQ 20 Register
32
R/W 0000 0000h
MPU_L2_ILR21
Interrupt Priority Level For IRQ 21 Register
32
R/W 0000 0000h
MPU_L2_ILR22
Interrupt Priority Level For IRQ 22 Register
32
R/W 0000 0000h
MPU_L2_ILR23
Interrupt Priority Level For IRQ 23 Register
32
R/W 0000 0000h
MPU_L2_ILR24
Interrupt Priority Level For IRQ 24 Register
32
R/W 0000 0000h
MPU_L2_ILR25
Interrupt Priority Level For IRQ 25 Register
32
R/W 0000 0000h
MPU_L2_ILR26
Interrupt Priority Level For IRQ 26 Register
32
R/W 0000 0000h
MPU_L2_ILR27
Interrupt Priority Level For IRQ 27 Register
32
R/W 0000 0000h
MPU_L2_ILR28
Interrupt Priority Level For IRQ 28 Register
32
R/W 0000 0000h
MPU_L2_ILR29
Interrupt Priority Level For IRQ 29 Register
32
R/W 0000 0000h
MPU_L2_ILR30
Interrupt Priority Level For IRQ 30 Register
32
R/W 0000 0000h
MPU_L2_ILR31
Interrupt Priority Level For IRQ 31 Register
32
R/W 0000 0000h
MPU_L2_ISR
Software Interrupt Set Register
32
W
0000 0000h
MPU_L2_STATUS
Status Register
32
R
0000 0000h
MPU_L2_OCP_CFG
OCP Configuration Register
32
R/W 0000 0000h
MPU_L2_INTH_REV
Interrupt Controller Revision ID
32
R
0000 0000h
BYTE
ADDRESS
REGISTER NAME
FFFE:3000 −
FFFE:301F
LCDCONV_R_LOOK_UP
FFFE:3020 −
FFFE:303F
LCDCONV_B_LOOK_UP
FFFE:3040−
FFFE:307F
LCDCONV_G_LOOK_UP
FFFE:3080 LCDCONV_CONTROL
FFFE:3084 LCDCONV_DEV_REV
Table 3−4. LCDCONV Registers
DESCRIPTION
R Look-up Table Register File
B Look-up Table Register File
G Look-up Table Register File
Control Register
Device Revision Register
ACCESS ACCESS
WIDTH TYPE
RESET
VALUE
8
R/W undefined
8
R/W undefined
8
R/W undefined
8
R/W 0000h
8
R
undefined
December 2003 − Revised December 2005
SPRS231E 107