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OMAP5912ZZG Datasheet, PDF (116/269 Pages) Texas Instruments – This data sheet revision history highlights the technical changes made to SPRS231D to generate SPRS231E
Functional Overview
Table 3−11. System DMA Controller Registers (Continued)
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS ACCESS
WIDTH TYPE
RESET
VALUE
FFFE:DA04 SYS_DMA_CICR_CH8
Logical Channel 8 Interrupt Control Register
16
RW 0003h
FFFE:DA06 SYS_DMA_CSR_CH8
Logical Channel 8 Status Register
16
R
0000h
FFFE:DA08 SYS_DMA_CSSA_L_CH8
Logical Channel 8 Source Start Address
Register LSB
16
RW undef
FFFE:DA0A SYS_DMA_CSSA_U_CH8
Logical Channel 8 Source Start Address
Register MSB
16
RW undef
FFFE:DA0C SYS_DMA_CDSA_L_CH8
Logical Channel 8 Destination Start Address
Register LSB
16
RW undef
FFFE:DA0E SYS_DMA_CDSA_U_CH8
Logical Channel 8 Destination Start Address
Register MSB
16
RW undef
FFFE:DA10 SYS_DMA_CEN_CH8
Logical Channel 8 Element Number Register
16
RW undef
FFFE:DA12 SYS_DMA_CFN_CH8
Logical Channel 8 Frame Number Register
16
RW undef
FFFE:DA14 SYS_DMA_CSFI_CH8
Logical Channel 8 Source Frame Index
Register
16
RW undef
FFFE:DA16 SYS_DMA_CSEI_CH8
Logical Channel 8 Source Element Index
Register
16
RW undef
FFFE:DA18 SYS_DMA_CSAC_CH8
Logical Channel 8 Source Address Counter
Register
16
R
undef
FFFE:DA1A SYS_DMA_CDAC_CH8
Logical Channel 8 Destination Address
Counter Register
16
R
undef
FFFE:DA1C SYS_DMA_CDEI_CH8
Logical Channel 8 Destination Element Index
Register
16
RW undef
FFFE:DA1E SYS_DMA_CDFI_CH8
Logical Channel 8 Destination Frame Index
Register
16
RW undef
FFFE:DA20 SYS_DMA_COLOR_L_CH8
Logical Channel 8 Color Parameter Register,
Lower Bits
16
RW undef
FFFE:DA22 SYS_DMA_COLOR_U_CH8
Logical Channel 8 Color Parameter Register,
Upper Bits
16
RW undef
FFFE:DA24 SYS_DMA_CCR2
Channel Control Register 2
16
RW undef
FFFE:DA28 SYS_DMA_CLNK_CTRL
Channel Link Control Register
16
RW undef
FFFE:DA2A SYS_DMA_LCH_CTRL
Logical Channel Control Register
16
RW undef
FFFE:DB2C −
FFFE:DA3F
Reserved
FFFE:DA40 SYS_DMA_CSDP_CH9
Logical Channel 9 Source/Destination
Parameters Register
16
RW 0000h
FFFE:DA42 SYS_DMA_CCR_CH9
Logical Channel 9 Control Register
16
RW 0000h
FFFE:DA44 SYS_DMA_CICR_CH9
Logical Channel 9 Interrupt Control Register
16
RW 0003h
FFFE:DA46 SYS_DMA_CSR_CH9
Logical Channel 9 Status Register
16
R
0000h
FFFE:DA48 SYS_DMA_CSSA_L_CH9
Logical Channel 9 Source Start Address
Register LSB
16
RW undef
FFFE:DA4A SYS_DMA_CSSA_U_CH9
Logical Channel 9 Source Start Address
Register MSB
16
RW undef
FFFE:DA4C SYS_DMA_CDSA_L_CH9
Logical Channel 9 Destination Start Address
Register LSB
16
RW undef
FFFE:DA4E SYS_DMA_CDSA_U_CH9
Logical Channel 9 Destination Start Address
Register MSB
16
RW undef
FFFE:DA50 SYS_DMA_CEN_CH9
Logical Channel 9 Element Number Register
16
RW undef
FFFE:DA52 SYS_DMA_CFN_CH9
Logical Channel 9 Frame Number Register
16
RW undef
116 SPRS231E
December 2003 − Revised December 2005