TL16C550B Datasheet, PDF (8/35 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT

TL16C550B, TL16C550BI
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS136B – JANUARY 1994 – REVISED AUGUST 1996
system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
tcR Cycle time, read (tw7 + td8 + td9)
tcW Cycle time, write (tw6 + td5 + td6)
tw1 Pulse duration, clock high
tw2 Pulse duration, clock low
tw5 Pulse duration, address strobe low
tw6 Pulse duration, write strobe
tw7 Pulse duration, read strobe
tw8 Pulse duration, master reset
tsu1 Setup time, address valid before ADS↑
tsu2 Setup time, chip select valid before ADS↑
tsu3 Setup time, data valid before WR1↓ or WR2↑
th1 Hold time, address low after ADS↑
th2 Hold time, chip select valid after ADS↑
th3 Hold time, chip select valid after WR1↑ or WR2↓
th4 Hold time, address valid after WR1↑ or WR2↓
th5 Hold time, data valid after WR1↑ or WR2↓
th6 Hold time, chip select valid after RD1↑ or RD2↓
th7 Hold time, address valid after RD1↑ or RD2↓
td4† Delay time, chip select valid before WR1↓ or WR2↑
td5† Delay time, address valid before WR1↓ or WR2↑
td6† Delay time, write cycle, WR1↑ or WR2↓ to ADS↓
td7† Delay time, chip select valid to RD1↓ or RD2↑
td8† Delay time, address valid to RD1↓ or RD2↑
td9 Delay time, read cycle, RD1↑ or RD2↓ to ADS↓
td10 Delay time, RD1↓ or RD2↑ to data valid
td11 Delay time, RD1↑ or RD2↓ to floating data
† _{Only applies when ADS is low}
ALT. SYMBOL
RC
WC
tXH
tXL
tADS
tWR
tRD
tMR
tAS
tCS
tDS
tAH
tCH
tWCS
tWA
tDH
tRCS
tRA
tCSW
tAW
tWC
tCSR
tAR
tRC
tRVD
tHZ
FIGURE
1
1
2,3
2
3
2,3
2,3
2
2,3
2,3
2
2
2
3
3
2
2
2
3
3
3
3
3
TEST CONDITIONS
f = 9 MHz maximum
f = 9 MHz maximum
CL = 75 pF
CL = 75 pF
MIN MAX UNIT
87
ns
87
ns
40
ns
40
ns
9
ns
40
ns
40
ns
1
µs
8
ns
8
ns
15
ns
0
ns
0
ns
10
ns
10
ns
5
ns
10
ns
20
ns
7
ns
7
ns
40
ns
7
ns
7
ns
40
ns
45
ns
20
ns
system switching characteristics over recommended ranges of supply voltage and operating
free-air temperature (see Note 2)
PARAMETER
ALT. SYMBOL FIGURE
tdis(R) Disable time, RD1↑↓ or RD2↓↑ to DDIS↑↓
tRDD
3
NOTE 2: Charge and discharge time is determined by VOL, VOH, and external loading.
TEST CONDITIONS
CL = 75 pF
MIN MAX UNIT
20
ns
baud generator switching characteristics over recommended ranges of supply voltage and
operating free-air temperature, C_L = 75 pF
PARAMETER
ALT. SYMBOL FIGURE TEST CONDITIONS MIN MAX UNIT
tw3
Pulse duration, BAUDOUT low
tw4
Pulse duration, BAUDOUT high
td1
Delay time, XIN↑ to BAUDOUT↑
td2
Delay time, XIN↑↓ to BAUDOUT↓
tLW
tHW
tBLD
tBHD
1
f = 9 MHz, CLK ÷ 2
1
f = 9 MHz, CLK ÷ 2
1
1
80
ns
80
ns
75 ns
65 ns
8
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