TL16C550B Datasheet, PDF (4/35 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT

TL16C550B, TL16C550BI
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS136B – JANUARY 1994 – REVISED AUGUST 1996
functional block diagram
S
e
Internal ⁸
Data Bus
l
e
c
t
Receiver
FIFO
8 –1
D7 – D0
Data
Bus
Buffer
Receiver
Buffer
Register
28
A0
A1 ²⁷
A2 ²⁶
12
CS0
CS1 ¹³
14
CS2
ADS ²⁵
MR ³⁵
21
RD1
RD2 ²²
WR1 ¹⁸
19
WR2
23
DDIS
TXRDY ²⁴
XIN ¹⁶
XOUT ¹⁷
RXRDY ²⁹
Select
and
Control
Logic
Line
Control
Register
Divisor
Latch (LS)
Divisor
Latch (MS)
Line
Status
Register
Transmitter
Holding
Register
Modem
Control
Register
Modem
Status
Register
Baud
Generator
Transmitter
S
FIFO
e
l
e
c
t
Interrupt
Enable
Register
Interrupt
I/O
Register
FIFO
Control
Register
Terminal numbers shown are for the N package.
Interrupt
Control
Logic
Receiver
Shift
Register
10
SIN
Receiver
Timing and
Control
9
RCLK
15 _BAUDOUT
Line
Control
Register
Line
Control
Register
Modem
Control
Logic
11
SOUT
32
RTS
36
CTS
33
DTR
37
DSR
38
DCD
39
RI
34
OUT1
31 _OUT2
30
INTRPT
4
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