SMJ320C6701_07 Datasheet, PDF (8/64 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

SMJ320C6701
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS030B – APRIL 2000 – REVISED MAY 2001
Signal Descriptions
SIGNAL
NAME
NO.
TYPE^†
DESCRIPTION
CLOCK/PLL
CLKIN
A14
I
Clock Input
CLKOUT1
Y6
O Clock output at full device speed
CLKOUT2
V9
O Clock output at half of device speed
CLKMODE1
B17
CLKMODE0
C17
Clock mode select
I
• Selects whether the output clock frequency = input clock freq x4 or x1
PLLFREQ3
C13
PLL frequency range (3, 2, and 1)
PLLFREQ2
G11
I
• The target range for CLKOUT1 frequency is determined by the 3-bit value of the PLLFREQ pins.
PLLFREQ1
F11
PLLV^‡
PLLG^‡
D12
A^§ PLL analog VCC connection for the low-pass filter
G10
A^§ PLL analog GND connection for the low-pass filter
PLLF
C12
A^§ PLL low-pass filter connection to external components and a bypass capacitor
JTAG EMULATION
TMS
K19
I
JTAG test port mode select (features an internal pull-up)
TDO
R12
O/Z JTAG test port data out
TDI
R13
I
JTAG test port data in (features an internal pull-up)
TCK
M20
I
JTAG test port clock
TRST
EMU1
EMU0
N18
I
JTAG test port reset (features an internal pull-down)
R20
I/O/Z Emulation pin 1, pull-up with a dedicated 20-kΩ resistor^¶
T18
I/O/Z Emulation pin 0, pull-up with a dedicated 20-kΩ resistor^¶
RESET AND INTERRUPTS
RESET
J20
I
Device reset
NMI
K21
I
Nonmaskable interrupt
• Edge-driven (rising edge)
EXT_INT7
R16
EXT_INT6
P20
External interrupts
EXT_INT5
R15
I
• Edge-driven (rising edge)
EXT_INT4
R18
IACK
R11
O Interrupt acknowledge for all active interrupts serviced by the CPU
INUM3
INUM2
INUM1
INUM0
T19
T20
Active interrupt identification number
O • Valid during IACK for all active interrupts (not just external)
T14
• Encoding order follows the interrupt service fetch packet ordering
T16
LITTLE ENDIAN/BIG ENDIAN
LENDIAN
G20
I
If high, selects little-endian byte/half-word addressing order within a word
If low, selects big-endian addressing
POWER DOWN STATUS
PD
D19
O Power-down mode 2 or 3 (active if high)
† _{I = Input, O = Output, Z = High Impedance, S = Supply Voltage, GND = Ground}
‡ _{PLLV and PLLG signals are not part of external voltage supply or ground. See the CLOCK/PLL documentation for information on how to connect}
those pins.
§ _{A = Analog Signal (PLL Filter)}
¶ _{For emulation and normal operation, pull up EMU1 and EMU0 with a dedicated 20-kΩ resistor. For boundary scan, pull down EMU1 and EMU0}
with a dedicated 20-kΩ resistor.
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