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AM1705_15 Datasheet, PDF (64/165 Pages) Texas Instruments – AM1705 ARM® Microprocessor
AM1705
SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
www.ti.com
Table 6-19. EMIFA Asynchronous Memory Switching Characteristics(1) (2) (3) (continued)
No.
PARAMETER
MIN
NOM
MAX
UNIT
11 td(EMWAITH-
EMOEH)
Delay time from EMA_WAIT deasserted to
EMA_OE high
WRITES
3E-3
4E
4E+3 ns
15 tc(EMWCYCLE)
EMIF write cycle time (EW = 0)
EMIF write cycle time (EW = 1)
(WS+WST+WH)*
E-3
(WS+WST+WH)*E
(WS+WST+WH)*
E+3
ns
(WS+WST+WH+E (WS+WST+WH+EW (WS+WST+WH+
WC)*E - 3
C)*E
EWC)*E + 3
ns
Output setup time, EMA_CE[5:2] low to
EMA_WE low (SS = 0)
16 tsu(EMCEL-EMWEL) Output setup time, EMA_CE[5:2] low to
EMA_WE low (SS = 1)
(WS)*E - 3
-3
(WS)*E
0
(WS)*E + 3 ns
+3 ns
Output hold time, EMA_WE high to
EMA_CE[5:2] high (SS = 0)
17 th(EMWEH-EMCEH) Output hold time, EMA_WE high to
EMA_CE[5:2] high (SS = 1)
(WH)*E-3
-3
(WH)*E
0
(WH)*E+3 ns
+3 ns
18 tsu(EMDQMV-
EMWEL)
Output setup time, EMA_BA[1:0] valid to
EMA_WE low
19 th(EMWEH-
EMDQMIV)
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
20 tsu(EMBAV-
EMWEL)
Output setup time, EMA_BA[1:0] valid to
EMA_WE low
21
th(EMWEH-EMBAIV)
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
(WS)*E-3
(WH)*E-3
(WS)*E-3
(WH)*E-3
(WS)*E
(WH)*E
(WS)*E
(WH)*E
(WS)*E+3 ns
(WH)*E+3 ns
(WS)*E+3 ns
(WH)*E+3 ns
22
tsu(EMAV-EMWEL)
Output setup time, EMA_A[13:0] valid to
EMA_WE low
(WS)*E-3
(WS)*E
(WS)*E+3 ns
23
th(EMWEH-EMAIV)
Output hold time, EMA_WE high to
EMA_A[13:0] invalid
(WH)*E-3
(WH)*E
(WH)*E+3 ns
24 tw(EMWEL)
EMA_WE active low width (EW = 0)
EMA_WE active low width (EW = 1)
(WST)*E-3
(WST+EWC)*E-3
(WST)*E
(WST)*E+3 ns
(WST+EWC)*E
(WST+EWC)*E+
3
ns
25 td(EMWAITH-
EMWEH)
Delay time from EMA_WAIT deasserted to
EMA_WE high
26
tsu(EMDV-EMWEL)
Output setup time, EMA_D[15:0] valid to
EMA_WE low
3E-3
(WS)*E-3
4E
(WS)*E
4E+3 ns
(WS)*E+3 ns
27
th(EMWEH-EMDIV)
Output hold time, EMA_WE high to
EMA_D[15:0] invalid
(WH)*E-3
(WH)*E
(WH)*E+3 ns
64
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