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AM1705_15 Datasheet, PDF (129/165 Pages) Texas Instruments – AM1705 ARM® Microprocessor
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AM1705
SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
6.22.3 I2C Electrical Data/Timing
6.22.3.1 Inter-Integrated Circuit (I2C) Timing
Table 6-80 and Table 6-81 assume testing over recommended operating conditions (see Figure 6-45 and
Figure 6-46).
No.
1 tc(SCL)
2 tsu(SCLH-SDAL)
3 th(SCLL-SDAL)
4 tw(SCLL)
5 tw(SCLH)
6 tsu(SDA-SCLH)
7 th(SDA-SCLL)
8 tw(SDAH)
9 tr(SDA)
10 tr(SCL)
11 tf(SDA)
12 tf(SCL)
13 tsu(SCLH-SDAH)
14 tw(SP)
15 Cb
Table 6-80. I2C Input Timing Requirements
PARAMETER
Cycle time, I2Cx_SCL
Setup time, I2Cx_SCL high before I2Cx_SDA low
Hold time, I2Cx_SCL low after I2Cx_SDA low
Pulse duration, I2Cx_SCL low
Pulse duration, I2Cx_SCL high
Setup time, I2Cx_SDA before I2Cx_SCL high
Hold time, I2Cx_SDA after I2Cx_SCL low
Pulse duration, I2Cx_SDA high
Rise time, I2Cx_SDA
Rise time, I2Cx_SCL
Fall time, I2Cx_SDA
Fall time, I2Cx_SCL
Setup time, I2Cx_SCL high before I2Cx_SDA high
Pulse duration, spike (must be suppressed)
Capacitive load for each bus line
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
MIN
10
2.5
4.7
0.6
4
0.6
4.7
1.3
4
0.6
250
100
0
0
4.7
1.3
20 + 0.1Cb
20 + 0.1Cb
20 + 0.1Cb
20 + 0.1Cb
4
0.6
N/A
0
MAX UNIT
μs
μs
μs
μs
μs
ns
μs
0.9
μs
1000
ns
300
1000
ns
300
300
ns
300
300
ns
300
μs
ns
50
400
pF
400
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