SLWS132 Datasheet, PDF (6/46 Pages) Texas Instruments – QUAD RECEIVER CHIP

GC4014 QUAD RECEIVER CHIP
DATA SHEET REV 0.6
GC4014 DATASHEET
1.0 KEY FEATURES
• Input rates up to 64 MSPS
• Four real input down-convert channels or
Two complex input downconvert channels
• Independent tuning frequencies
• Independent phase/gain controls
• 4 by 4 14 bit Input Crossbar switch or
3 by 4 16 bit Input Crossbar switch
• Decimation factors of
16 to 32,768 in the real output mode
32 to 65,536 in the complex output mode
• Zero padding for lower decimation factors
• Outputs can be either:
bit serial,
nibble serial (link port)
or memory mapped
• Output summing for beamforming
• 8 to 16 bit output samples
• 0.02 Hz tuning resolution
• 0.14 dB gain resolution
• Less than 0.05 dB peak to peak passband
ripple
• Greater than 100 dB far image rejection
• Greater than 95 dB spur free dynamic range
• User programmable 63 tap output filter
• Nyquist filtering for QPSK or QAM symbol
data
• Meets GSM, AMPS and DAMPS Cellular
specifications
• Microprocessor interface for control, output,
and diagnostics
• Built in diagnostics
• Microprocessor interface will accept either
3.3 or 5 volt input levels
• 250 mW per channel at 50 MHz, 3.3 volts
• 100 pin thin QFP package
2.0 BLOCK DIAGRAM
A block diagram illustrating the major functions of the chip is shown in Figure 1.
AIN
(14 BITS)
BIN
(14 BITS)
CIN
(14 BITS)
CK
CLOCK DOUBLING
AND
DISTRIBUTION CIRCUIT
DIAGNOSTICS
CROSSBAR SWITCH
(16 bit input mode uses the DIN pins for the LSB’s of inputs AIN, BIN, and CIN)
DIN
(14 BITS)
CE
WR
RD
A[0:4]
C[0:7]
SI
CONTROL INTERFACE
AND FILTER
COEFFICIENT RAMS
BANDWIDTH
DECIMATE
BY 8 TO 16K
FILTER
FILTER SELECT
DECIMATE BY 8
TWO STAGE
DECIMATE
BY 4OR 8
FILTER
SYNC COUNTER
AND
DIAGNOSTIC TEST
GENERATOR
FORMAT
SELECT
OUTPUT
FORMAT
AND GAIN
GAIN
SO
AOUT
(BIT SERIAL)
DECIMATE
BY 8 TO 16K
FILTER
TWO STAGE
DECIMATE
BY 4OR 8
FILTER
OUTPUT
FORMAT
AND GAIN
GAIN
DECIMATE
BY 8 TO 16K
FILTER
TWO STAGE
DECIMATE
BY 4OR 8
FILTER
OUTPUT
FORMAT
AND GAIN
GAIN
OUTPUT SUM AND MULTIPLEX
BOUT
(BIT SERIAL)
COUT
(BIT SERIAL)
Figure 1. GC4014 Block Diagram
DECIMATE
BY 8 TO 16K
FILTER
TWO STAGE
DECIMATE
BY 4OR 8
FILTER
OUTPUT
FORMAT
AND GAIN
GAIN
ACKNOWLEDGE
DOUT
(BIT SERIAL)
GRAYCHIP, INC.
-1-
APRIL 27, 1999
This document contains information which may be changed at any time without notice