SLWS132 Datasheet, PDF (29/46 Pages) Texas Instruments – QUAD RECEIVER CHIP

GC4014 QUAD RECEIVER CHIP
DATA SHEET REV 0.6
5.15 CHANNEL OUTPUT PAGE (PAGE = 0)
Addresses 16 through 31 are used to read output values. The outputs are 16 bit two’s complement
numbers which are read as two 8 bit bytes, the lower address contains the lower byte. See Table 1 for the output
value definitions when SUM_MODE is used. The address assignments are:
ADDRESSES
NAME
16,17
18,19
20,21
22,23
A_OUT, I-half
A_OUT, Q-half
B_OUT, I-half
B_OUT,Q-half
These are all read only registers.
ADDRESSES
24,25
26,27
28,29
30,31
NAME
C_OUT, I-half
C_OUT,Q-half
D_OUT, I-half
D_OUT,Q-half
5.16 KEEPALIVE STATUS PAGE (PAGE = 1)
ADDRESS 16: Clock Status
BIT
TYPE
NAME
DESCRIPTION
0
R
1
R
2-7
-
KACK
KA_MODE
unused
This bit monitors the keepalive clock.
This bit monitors the keepalive mode.
These bits are used for factory test purposes only.
ADDRESS 17: Mask Revision
BIT
TYPE
NAME
DESCRIPTION
0-7
R
REVISION
Mask revision number.
This address can be used to determine the mask revision number for the GC4014. The mask revision
numbers are shown in Table 5 below (the mask codes are printed on the GC4014 package).
Table 5: Mask Revisions
Mask
Revision
Number
(Address 17)
Release Date
0
October 1997
0
January 1998
Mask Code
on Package
Description
55532B
55532C
Original
Corrected problems with non-symmetry mode, did not
change mask revision number in address 17.
GRAYCHIP, INC.
- 24 -
APRIL 27, 1999
This document contains information which may be changed at any time without notice