SLWS132 Datasheet, PDF (28/46 Pages) Texas Instruments – QUAD RECEIVER CHIP

GC4014 QUAD RECEIVER CHIP
DATA SHEET REV 0.6
5.13 STATUS CONTROL REGISTER
This register contains miscellaneous control and status information.
ADDRESS 14: Status Control Register, suggested default = 0x00
BIT
TYPE
NAME
DESCRIPTION
0 LSB
R/W
1
R/W
2
R/W
3
R/W
4
R/W
5
R/W
6
R/W
7 MSB
R/W
READY
MISSED
unused
GAIN_OVERFLOW
OVERFLOW_A
OVERFLOW_B
OVERFLOW_C
OVERFLOW_D
The user sets this bit after reading the output registers. The chip
clears this bit when new values have been loaded and it is time
to read them.
The chip sets this bit If the user has not set the READY bit before
the chip loads the output registers. This bit high indicates that an
error has occurred.
Indicates an overflow in the final gain circuit.
Indicates overflow in channel A’s coarse gain.
Indicates overflow in channel B’s coarse gain.
Indicates overflow in channel C’s coarse gain.
Indicates overflow in channel D’s coarse gain.
The READY bit is used to tell an external processor when new output samples are ready to be read. If
desired, the RDY pin can be used as an interrupt to the external processor (See Section 5.2) to tell the processor
when to read new samples. The user does not need to set the READY bit if RDY is used. If READY is not set,
however, the MISSED flag will not be valid.
The overflow bits are set when an overflow occurs and stays set until the user clears them. If the
SO_INT_MODE bit in control register 1 is set, then the SO pin will go low if OVERFLOW_A, OVERFLOW_B,
OVERFLOW_C, or OVERFLOW_D go active. GAIN_OVERFLOW will not cause SO to go low.
GAIN_OVERFLOW is set if the final gain circuit detects an overflow in any channel (or sum of channels if
SUM_MODE is active).
5.14 CHECKSUM REGISTER
The checksum register is a read only register which contains the checksum of the output data. The
checksum is stored in the checksum register and then starts over again each time the DIAG_SYNC (See
Section 5.11) occurs. This is a read only register.
ADDRESS 15: Checksum Register
BIT
TYPE
0-7
R
NAME
CHECKSUM[0:7]
DESCRIPTION
The checksum.
GRAYCHIP, INC.
- 23 -
APRIL 27, 1999
This document contains information which may be changed at any time without notice