CC2500_06 Datasheet, PDF (55/84 Pages) Texas Instruments – Single Chip Low Cost Low Power RF Transceiver

CC2500
31.1 Configuration Register Details – Registers with preserved values in sleep state
Bit Field Name
7
Reserved
6 _{GDO2_INV}
5:0 _{GDO2_CFG[5:0]}
0x00: IOCFG2 – GDO2 output pin configuration
Reset
R/W Description
0
41 (0x29)
R0
R/W Invert output, i.e. select active low (1) / high (0)
R/W Default is CHIP_RDY (see Table 33 on page 47).
Bit Field Name
7
GDO_DS
6 _{GDO1_INV}
5:0 _{GDO1_CFG[5:0]}
0x01: IOCFG1 – GDO1 output pin configuration
Reset
0
0
46 (0x2E)
R/W Description
R/W Set high (1) or low (0) output drive strength on the
GDO pins.
R/W Invert output, i.e. select active low (1) / high (0)
R/W Default is 3-state (see Table 33 on page 47)
0x02: IOCFG0 – GDO0 output pin configuration
Bit Field Name
Reset
R/W Description
7 TEMP_SENSOR_ENABLE
6 _{GDO0_INV}
5:0 _{GDO0_CFG[5:0]}
0
0
63 (0x3F)
R/W Enable analog temperature sensor. Write 0 in all other
register bits when using temperature sensor.
R/W Invert output, i.e. select active low (1) / high (0)
R/W Default is CLK_XOSC/192 (see Table 33 on page 47).
PRELIMINARY Data Sheet (Rev.1.2) SWRS040A
Page 55 of 83