CC2500_06 Datasheet, PDF (23/84 Pages) Texas Instruments – Single Chip Low Cost Low Power RF Transceiver

CC2500
10.6 PATABLE Access
The 0x3E address is used to access the
PATABLE, which is used for selecting PA
power control settings. The SPI expects up to
eight data bytes after receiving the address.
By programming the PATABLE, controlled PA
power ramp-up and ramp-down can be
achieved. See Section 24 on page 42 for
output power programming details.
The PATABLE is an 8-byte table that defines
the PA control settings to use for each of the
eight PA power values (selected by the 3-bit
value FREND0.PA_POWER). The table is
written and read from the lowest setting (0) to
the highest (7), one byte at a time. An index
counter is used to control the access to the
table. This counter is incremented each time a
byte is read or written to the table, and set to
the lowest index when CSn is high. When the
highest value is reached the counter restarts
at 0.
The access to the PATABLE is either single
byte or burst access depending on the burst
bit. When using burst access the index counter
will count up; when reaching 7 the counter will
restart at 0. The read/write bit controls whether
the access is a write access (R/W=0) or a read
access (R/W=1).
If one byte is written to the PATABLE and this
value is to be read out then CSn must be set
high before the read access in order to set the
index counter back to zero.
Note that the content of the PATABLE is lost
when entering the SLEEP state, except for the
first byte (index 0).
11 Microcontroller Interface and Pin Configuration
In a typical system, CC2500 will interface to a
microcontroller. This microcontroller must be
able to:
• Program CC2500 into different modes
• Read and write buffered data
• Read back status information via the 4-wire
SPI-bus configuration interface (SI, SO,
SCLK and CSn)
11.1 Configuration Interface
The microcontroller uses four I/O pins for the
SPI configuration interface (SI, SO, SCLK and
CSn). The SPI is described in Section 10 on
page 19.
11.2 General Control and Status Pins
The CC2500 has two dedicated configurable
pins and one shared pin that can output
internal status information useful for control
software. These pins can be used to generate
interrupts on the MCU. See Section 28 on
page 46 for more details on the signals that
can be programmed. The dedicated pins are
called GDO0 and GDO2. The shared pin is the
SO pin in the SPI interface. The default setting
for GDO1/SO is 3-state output. By selecting
any other of the programming options the
GDO1/SO pin will become a generic pin. When
CSn is low, the pin will always function as a
normal SO pin.
In the synchronous and asynchronous serial
modes, the GDO0 pin is used as a serial TX
data input pin while in transmit mode.
The GDO0 pin can also be used for an on-chip
analog temperature sensor. By measuring the
voltage on the GDO0 pin with an external ADC,
the temperature can be calculated.
Specifications for the temperature sensor are
found in Section 4.7 on page 12.
With default PTEST register setting (0x7F) the
temperature sensor output is only available
when the frequency synthesizer is enabled
(e.g. the MANCAL, FSTXON, RX and TX
states). It is necessary to write 0xBF to the
PTEST register to use the analog temperature
sensor in the IDLE state. Before leaving the
IDLE state, the PTEST register should be
restored to its default value (0x7F).
11.3 Optional Radio Control Feature
The CC2500 has an optional way of controlling
the radio, by reusing SI, SCLK and CSn from
the SPI interface. This feature allows for a
simple three-pin control of the major states of
the radio: SLEEP, IDLE, RX and TX.
This optional functionality is enabled with the
MCSM0.PIN_CTRL_EN configuration bit.
State changes are commanded as follows:
When CSn is high the SI and SCLK is set to
the desired state according to Table 18. When
CSn goes low the state of SI and SCLK is
latched and a command strobe is generated
PRELIMINARY Data Sheet (Rev.1.2) SWRS040A
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