CC2500_06 Datasheet, PDF (52/84 Pages) Texas Instruments – Single Chip Low Cost Low Power RF Transceiver

CC2500
Address Register Description
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
IOCFG2
IOCFG1
IOCFG0
FIFOTHR
SYNC1
SYNC0
PKTLEN
PKTCTRL1
PKTCTRL0
ADDR
CHANNR
FSCTRL1
FSCTRL0
FREQ2
FREQ1
FREQ0
MDMCFG4
MDMCFG3
MDMCFG2
MDMCFG1
MDMCFG0
DEVIATN
MCSM2
MCSM1
MCSM0
FOCCFG
BSCFG
AGCTRL2
AGCTRL1
AGCTRL0
WOREVT1
WOREVT0
WORCTRL
FREND1
FREND0
FSCAL3
FSCAL2
FSCAL1
FSCAL0
RCCTRL1
RCCTRL0
FSTEST
PTEST
AGCTEST
TEST2
TEST1
TEST0
GDO2 output pin configuration
GDO1 output pin configuration
GDO0 output pin configuration
RX FIFO and TX FIFO thresholds
Sync word, high byte
Sync word, low byte
Packet length
Packet automation control
Packet automation control
Device address
Channel number
Frequency synthesizer control
Frequency synthesizer control
Frequency control word, high byte
Frequency control word, middle byte
Frequency control word, low byte
Modem configuration
Modem configuration
Modem configuration
Modem configuration
Modem configuration
Modem deviation setting
Main Radio Control State Machine configuration
Main Radio Control State Machine configuration
Main Radio Control State Machine configuration
Frequency Offset Compensation configuration
Bit Synchronization configuration
AGC control
AGC control
AGC control
High byte Event 0 timeout
Low byte Event 0 timeout
Wake On Radio control
Front end RX configuration
Front end TX configuration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
RC oscillator configuration
RC oscillator configuration
Frequency synthesizer calibration control
Production test
AGC test
Various test settings
Various test settings
Various test settings
Preserved in
SLEEP state
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Table 35: Configuration registers overview
Details on
page number
55
55
55
56
56
56
56
57
58
58
58
59
59
59
59
59
60
60
61
62
62
63
64
65
66
67
68
69
70
71
71
72
72
72
73
73
73
73
74
74
74
74
74
74
75
75
75
PRELIMINARY Data Sheet (Rev.1.2) SWRS040A
Page 52 of 83