LMF100_15 Datasheet, PDF (5/40 Pages) Texas Instruments – LMF100 Dual High-Performance Switched Capacitor Filters

www.ti.com
LMF100
SNOSBG9B – JULY 1999 – REVISED JUNE 2015
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
LMF100
DW (SOIC)
N (PDIP)
UNIT
20 PINS
20 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
63.8
49.5
°C/W
27.2
41.1
°C/W
31.8
30.4
°C/W
5.7
18.3
°C/W
31.3
30.3
°C/W
—
—
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics for V⁺ = +5 V and V^− = −5 V
The following specifications apply for Mode 1, Q = 10 (R₁ = R₃ = 100 k, R₂ = 10 k), V⁺ = +5 V and V^− = −5 V unless otherwise
specified. All limits are T_A = T_J = 25°C unless otherwise specified.
PARAMETER
TEST CONDITIONS
LMF100CCN
MIN
TYP
MAX
LMF100CIWM
MIN
TYP
MAX
UNIT
9
9
I_s
Maximum supply current
f_CLK = 250 kHz,
No Input Signal
Tested
Limit ⁽¹⁾
Design
Limit ⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
13
13 ^mA
13
f₀
Center frequency
0.1
10000
0
0.1
100000 Hz
f_CLK Clock frequency
5
35000
00
5
3500000 Hz
±0.2%
±0.2%
f_CLK/f Clock to center frequency ratio
0
deviation
V_Pin12 = 5 V or 0
V, f_CLK = 1 MHz
Tested
Limit⁽¹⁾
Design
Limit⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
±0.8%
±0.8%
±0.8%
DQ
Q Error (MAX) ⁽³⁾
Q
Q = 10, Mode 1,
V_Pin12 = 5 V or 0
V,
f_CLK = 1 MHz
Tested
Limit⁽¹⁾
Design
Limit⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
±0.5%
±5%
±6%
±0.5%
±6%
0
0
H_OBP Bandpass gain at f₀
f_CLK = 1 MHz
Tested
Limit⁽¹⁾
Design
Limit⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
±0.4
±0.4 ^dB
±0.4
0
0
H_OLP DC Lowpass gain
R₁ = R₂ = 10 k,
f_CLK = 250 kHz
Tested
Limit⁽¹⁾
Design
Limit⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
±0.2
±0.2 ^dB
±0.2
±5
±5
V_OS1 DC Offset voltage⁽⁴⁾
f_CLK = 250 kHz
Tested
Limit⁽¹⁾
Design
Limit⁽²⁾
T_MIN to T_MAX
T_MIN to T_MAX
±15
±15 ^mV
±15
(1) Tested limits are specified to Texas Instruments AOQL (Average Outgoing Quality Level).
(2) Design limits are specified to Texas Instruments AOQL (Average Outgoing Quality Level) but are not 100% tested.
(3) The accuracy of the Q value is a function of the center frequency (f₀). This is illustrated in the curves under the heading Typical
Characteristics.
(4) V_os1, V_os2, and V_os3 refer to the internal offsets as discussed in Application Information.
Copyright © 1999–2015, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: LMF100