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LMF100_15 Datasheet, PDF (31/40 Pages) Texas Instruments – LMF100 Dual High-Performance Switched Capacitor Filters
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LMF100
SNOSBG9B – JULY 1999 – REVISED JUNE 2015
Typical Application (continued)
frequency is fs/2 + 100 Hz will cause the system to respond as though the input frequency was fs/2 − 100 Hz.
This phenomenon is known as aliasing, and can be reduced or eliminated by limiting the input signal spectrum to
less than fs/2. This may in some cases require the use of a bandwidth-limiting filter ahead of the LMF100 to limit
the input spectrum. However, because the clock frequency is much higher than the center frequency, this will
often not be necessary.
Another characteristic of sampled-data circuits is that the output signal changes amplitude once every sampling
period, resulting in “steps” in the output voltage which occur at the clock rate (Figure 62). If necessary, these can
be “smoothed” with a simple R-C lowpass filter at the LMF100 output.
The ratio of fCLK to fc (normally either 50:1 or 100:1) will also affect performance. A ratio of 100:1 will reduce any
aliasing problems and is usually recommended for wideband input signals. In noise-sensitive applications, a ratio
of 100:1 will result in 3 dB lower output noise for the same filter configuration.
The accuracy of the fCLK/f0 ratio is dependent on the value of Q. This is shown in the curves under the heading
Figure 54. As Q is changed, the true value of the ratio changes as well. Unless the Q is low, the error in fCLK/f0
will be small. If the error is too large for a specific application, use a mode that allows adjustment of the ratio with
external resistors.
9.2.3 Application Curve
Figure 62. The Sampled-Data Output Waveform
Figure 63. The Wide BW of a Fourth-Order Butterworth LP Implemented With One LMF100
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