LMF100_15 Datasheet, PDF (26/40 Pages) Texas Instruments – LMF100 Dual High-Performance Switched Capacitor Filters

LMF100
SNOSBG9B – JULY 1999 – REVISED JUNE 2015
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Typical Application (continued)
The complete circuit is shown in Figure 54 for split ±5-V power supplies. TI highly recommends Supply bypass
capacitors.
±5-V power supply. 0-V to 5-V TTL or ±5-V CMOS logic levels.
Figure 54. Fourth-Order Chebyshev Lowpass Filter from Example in 3.1.
9.2.2 Detailed Design Procedure
9.2.2.1 Single-Supply Operation
The LMF100 can also operate with a single-ended power supply. Figure 55 shows the example filter with a
single-ended power supply. V_A+ and V_D+ are again connected to the positive power supply (4 to 15 volts), and
V_A^− and V_D^− are connected to ground. The AGND pin must be tied to V⁺/2 for single-supply operation. This half-
supply point should be very “clean”, as any noise appearing on it will be treated as an input to the filter. It can be
derived from the supply voltage with a pair of resistors and a bypass capacitor (Figure 56), or a low-impedance
half-supply voltage can be made using a three-terminal voltage regulator or an operational amplifier (Figure 57
and Figure 58). The passive resistor divider with a bypass capacitor is sufficient for many applications, provided
that the time constant is long enough to reject any power supply noise. It is also important that the half-supply
reference present a low impedance to the clock frequency, so at very low clock frequencies the regulator or
operational amplifier approaches may be preferable because they will require smaller capacitors to filter the clock
frequency. The main power supply voltage should be clean (preferably regulated) and bypassed with 0.1 μF
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