DS90UB927-Q1 Datasheet, PDF (3/56 Pages) Texas Instruments – 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel

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DS90UB927Q Pin Diagram
DS90UB927-Q1, DS90UB927Q, DS90UB927Q-Q1
SNLS416B – JUNE 2012
RxIN1- 31
RxIN1+ 32
RxIN2- 33
RxIN2+ 34
RxCLKIN- 35
RxCLKIN+ 36
RxIN3- 37
RxIN3+ 38
GPIO0 39
GPIO1 40
DS90UB927Q
TOP VIEW
DAP = GND
20 CMF
19 VDD33_A
18 PDB
17 DOUT+
16 DOUT-
15 RES1
14 CAPHS12
13 RES0
12 CAPP12
11 IDx
Figure 2. DS90UB927Q — Top View
Pin Descriptions
Pin Name
Pin #
I/O, Type Description
FPD-Link Input Interface
RxIN[3:0]+ 38, 34, 32, 30
I, LVDS
True LVDS Data Inputs
Each pair requires external 100Ω differential termination for standard LVDS levels
RxIN[3:0]- 37, 33, 31, 29
I, LVDS
Inverting LVDS Data Inputs
Each pair requires external 100Ω differential termination for standard LVDS levels
RxCLKIN+
36
I, LVDS
True LVDS Clock Input
The pair requires external 100Ω differential termination for standard LVDS levels
RxCLKIN-
35
I, LVDS
Inverting LVDS Clock Input
The pair requires external 100Ω differential termination for standard LVDS levels
LVCMOS Parallel Interface
I2S_WC
I2S_CLK
1
I, LVCMOS Digital Audio Interface I2S Word Clock and I2S Bit Clock Inputs
2
w/ pull down Shared with GPIO_REG7 and GPIO_REG8
Table 3
I2S_DA
I2S_DB
I2S_DC
I2S_DD
3
I, LVCMOS Digital Audio Interface I2S Data Inputs
4
w/ pull down Shared with GPIO_REG6, GPIO_REG5, GPIO2, GPIO3
5
6
GPIO[1:0]
40, 39
I/O, LVCMOS General Purpose I/O
w/ pull down See Table 1
REPEAT
21
I, LVCMOS Repeater Mode Select
w/ pull down REPEAT = 0, Repeater Mode disabled (Default)
REPEAT = 1, Repeater Mode enabled
Requires a 10kΩ pull-up if set HIGH
Copyright © 2012, Texas Instruments Incorporated
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Product Folder Links: DS90UB927-Q1 DS90UB927Q DS90UB927Q-Q1