DS90UB927-Q1 Datasheet, PDF (12/56 Pages) Texas Instruments – 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel

DS90UB927-Q1, DS90UB927Q, DS90UB927Q-Q1
SNLS416B – JUNE 2012
DC and AC Serial Control Bus Characteristics
Over 3.3V supply and temperature ranges unless otherwise specified. ^{(1) (2) (3)}
Symbol
Parameter
Conditions
V_IH
Input High Level
SDA and SCL
V_IL
Input Low Level Voltage
SDA and SCL
V_HY
V_OL
I_in
t_R
t_F
t_SU;DAT
t_HD;DAT
t_SP
C_in
Input Hysteresis
SDA RiseTime – READ
SDA Fall Time – READ
Set Up Time — READ
Hold Up Time — READ
Input Filter
Input Capacitance
SDA or SCL, IOL = 1.25mA
SDA or SCL, Vin = V_DDIO or GND
SDA, RPU = 10kΩ, Cb ≤ 400pF, Figure 11
Figure 11
Figure 11
SDA or SCL
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Min
0.7*
V_DDIO
GND
0
-10
Typ Max Units
V_DD33
V
0.3*
V_DD33
V
>50
mV
0.36
V
+10 µA
430
ns
20
ns
560
ns
615
ns
50
ns
<5
pF
(1) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
(2) Typical values represent most likely parametric norms at V_DD33 = 3.3V, V_DDIO = 1.8V or 3.3V, Ta = +25 degC, and at the Recommended
Operation Conditions at the time of product characterization and are not guaranteed.
(3) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except V_OD and ΔV_OD, which are differential voltages.Supply noise testing was done with minimum capacitors on the PCB. A sinusoidal
signal is AC coupled to the supply pins with amplitude = 100 mVp-p measured at the device V_DD33 and V_DDIO pins. Bit error rate testing
of input to the serializer and output of the deserializer with 10 meter cable shows no error when the noise frequency is less than 50MHz.
AC Timing Diagrams and Test Circuits
RxIN[3:0]+
RxCLKIN+
VTL
VCM
RxIN[3:0]-
RxClkIN-
VTH
+VOD/4
-VOD/4
GND
Figure 3. FPD-Link DC V_TH/V_TL Definition
12
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