DAC8574 Datasheet, PDF (22/40 Pages) Texas Instruments – QUAD, 16-BIT, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL-TO-ANALOG CONVERTER

DAC8574
SLAS377A – JANUARY 2003 – REVISED JUNE 2003
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Master Transmitter Writing to a Slave Receiver (DAC8574) in Standard/Fast Modes
All write access sequences begin with the device address (with R/W = 0) followed by the control byte. This
control byte specifies the operation mode of DAC8574 and determines which channel of DAC8574 is being
accessed in the subsequent read/write operation. The LSB of the control byte (PD0-Bit) determines if the
following data is power-down data or regular data.
With (PD0-Bit = 0) the DAC8574 expects to receive data in the following sequence HIGH-BYTE –LOW-BYTE –
HIGH-BYTE – LOW-BYTE..., until a STOP Condition or REPEATED START Condition on the I²C-Bus is
recognized (refer to the DATA INPUT MODE section of Table 4).
With (PD0-Bit = 1) the DAC8574 expects to receive 2 Bytes of power-down data (refer to the POWER DOWN
MODE section of Table 4).
Table 4. Write Sequence in F/S Mode
DATA INPUT MODE
Transmitter
MSB 6
Master
Master
1
0
DAC8574
Master
A3
A2
DAC8574
Master
D15 D14
DAC8574
Master
D7 D6
DAC8574
Master
POWER DOWN MODE
Transmitter
MSB 6
Master
Master
1
0
DAC8574
Master
A3
A2
DAC8574
Master
PD1 PD2
DAC8574
Master
0
0
DAC8574
Master
5
4
3
2
Start
0
1
1
A1
DAC8574 Acknowledges
Load 1 Load 0
x Buff Sel 1
DAC8574 Acknowledges
D13
D12
D11
D10
DAC8574 Acknowledges
D5
D4
D3
D2
DAC8574 Acknowledges
Data or Stop or Repeated Start ⁽¹⁾
1
A0
Buff Sel 0
D9
D1
LSB
R/W
Comment
Begin sequence
Write addressing (R/W=0)
PD0 Control byte (PD0=0)
D8 Writing data word, high byte
D0 Writing data word, low byte
Data or done ⁽²⁾
5
4
3
2
Start
0
1
1
A1
DAC8574 Acknowledges
Load 1 Load 0
x Buff Sel 1
DAC8574 Acknowledges
0
0
0
0
DAC8574 Acknowledges
0
0
0
0
DAC8574 Acknowledges
Stop or Repeated Start ⁽¹⁾
1
A0
Buff Sel 0
0
0
LSB Comment
Begin sequence
R/W Write addressing (R/W=0)
PD0 Control byte (PD0 = 1)
0 Writing data word, high byte
0 Writing data word, low byte
Done
(1) _{Use repeated START to secure bus operation and loop back to the stage of write addressing for next Write.}
(2) _{Once DAC8574 is properly addressed and control byte is sent, HIGH–BYTE–LOW–BYTE sequences can repeat until a STOP}
condition or repeated START condition is received.
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