DAC8574 Datasheet, PDF (18/40 Pages) Texas Instruments – QUAD, 16-BIT, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL-TO-ANALOG CONVERTER

DAC8574
SLAS377A – JANUARY 2003 – REVISED JUNE 2003
Broadcast Address Byte
MSB
1
0
0
1
0
0
LSB
0
0
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Broadcast addressing is also supported by DAC8574. Broadcast addressing can be used for synchronously
updating or powering down multiple DAC8574 devices. DAC8574 is designed to work with other members of the
DAC857x and DAC757x families to support multichannel synchronous update. Using the broadcast address,
DAC8574 responds regardless of the states of the address pins. Broadcast is supported only in write mode
(Master writes to DAC8574).
Control Byte
MSB
A3
A2
L1
L0
LSB
X Sel1 Sel0 PD0
Bit Name
A3
A2
L1
L2
Sel1
Sel0
PD0
Table 1. Control Register Bit Descriptions
Bit Number/Description
Extended Address Bit
Extended Address Bit
The state of these bits must match the state of pins A3 and A2 in order for a
proper DAC8574 data update, except in broadcast update mode.
Load1 (Mode Select) Bit
Load0 (Mode Select) Bit
Are used for selecting the update mode.
00
Store I²C data. The contents of MS-BYTE and LS-BYTE (or power down information) are stored in the
temporary register of a selected channel. This mode does not change the DAC output of the selected
channel.
01
Update selected DAC with I²C data. Most commonly utilized mode. The contents of MS-BYTE and
LS-BYTE (or power down information) are stored in the temporary register and in the DAC register of
the selected channel. This mode changes the DAC output of the selected channel with the new data.
10
4-Channel synchronous update. The contents of MS-BYTE and LS-BYTE (or power down information)
are stored in the temporary register and in the DAC register of the selected channel. Simultaneously,
the other three channels get updated with previously stored data from the temporary register. This
mode updates all four channels together.
11
Broadcast update mode. This mode has two functions. In broadcast mode, DAC8574 responds
regardless of local address matching, and channel selection becomes irrelevant as all channels update.
This mode is intended to enable up to 64 channels simultaneous update, if used with the I²C broadcast
address (1001 0000).
If Sel1=0
All four channels are updated with the contents of their temporary register
data.
If Sel1=1
All four channels are updated with the MS-BYTE and LS-BYTE data or
powerdown.
Buff Sel1 Bit
Buff Sel0 Bit
Channel Select Bits
00
Channel A
01
Channel B
10
Channel C
11
Channel D
Power Down Flag
0
Normal operation
1
Power-down flag (MSB7 and MSB6 indicate a power-down operation, as shown in Table 2).
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