DAC8574 Datasheet, PDF (11/40 Pages) Texas Instruments – QUAD, 16-BIT, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL-TO-ANALOG CONVERTER

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TYPICAL CHARACTERISTICS (continued)
At T_A = +25°C, unless otherwise noted.
EXITING POWER-DOWN MODE
5.5
5.0 V_DD = V_REF = 5 V
4.5 Power- Up Code = FFFFH
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
- 0.5
Time (4 µs/div)
Figure 31.
OUTPUT GLITCH (Worst Case)
4.72 _{VDD = VREF = 5 V}
4.70 Code EFFF_H to F000_H to EFFF_H
4.68 ^{(Glitch Occurs Every N • 4096}
Code Boundary)
4.66
4.64
4.62
4.60
4.58
4.56
4.54
Time (1µs/div)
Figure 33.
ABSOLUTE ERROR
10
8
6 ^{Channel B Output}
V_DD = V_REF = 2.7 V
T_A = 25°C
4
Channel D Output
2
0
-2
-4
-6
Channel A Output
-8
Channel C Output
- 10
0000_H 2000_H 4000_H 6000_H 8000_H A000_H C000_H E000_H FFFF_H
Digital Input Code
Figure 35.
DAC8574
SLAS377A – JANUARY 2003 – REVISED JUNE 2003
OUTPUT GLITCH (Mid-Scale)
2.53
2.52
V_DD = V_REF = 5 V
Code 7FFF_H to 8000_H to 7FFF_H
2.51 ^{(Glitch Occurs Every N • 4096}
2.50 ^{Code Boundary)}
2.49
2.48
2.47
2.46
2.45
2.44
2.43
Time (1µs/div)
Figure 32.
ABSOLUTE ERROR
20
18 ^VDD ^{= V}REF ^{= 5 V}
16 ^{TA = 25°C}
Channel D Output
14
Channel B Output
12
10
8
6
4
2
Channel A Output
Channel C Output
0
0000_H 2000_H 4000_H 6000_H 8000_H A000_H C000_H E000_H FFFF_H
Digital Input Code
Figure 34.
FULL-SCALE SETTLING TIME
(Large Signal)
6
V_DD = V_REF = 5.5 V
Output Loaded with
5
2 kΩ and 200 pF
to GND
4
3
2
1
0
Time (12 µs/div)
Figure 36.
11