DS125DF410_13 Datasheet, PDF (16/44 Pages) Texas Instruments – DS125DF410 Low Power Multi-Rate Quad Channel Retimer

DS125DF410
SNLS398E – JANUARY 2012 – REVISED MAY 2013
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Driver Output De-Emphasis
The output de-emphasis level of the DS125DF410 can be configured from a nominal setting of 0 dB to a nominal
setting of -15 dB depending upon the application. Larger absolute values of the de-emphasis setting provide
more pre-distortion of the output driver waveform, accentuating the high-frequency components of the output
driver waveform relative to the low-frequency components. Greater values of de-emphasis can compensate for
greater dispersion in the transmission media at the output of the DS125DF410. The output de-emphasis level as
set is the typical value to which the output signal will settle following the de-emphasis pulse interval in dB relative
to the output VOD.
Driver Output Rise/Fall Time
In some applications, a longer rise/fall time for the output signal is desired. This can reduce electromagnetic
interference (EMI) generated by fast switching waveforms. This is necessary in some applications for regulatory
compliance. In others, it can reduce the crosstalk in the system.
The DS125DF410 can be configured to operate with a nominal rise/fall time corresponding to the maximum slew
rate of the output drivers into the load capacitance. Alternatively, the DS125DF410 can be configured to operate
with a slightly greater rise/fall time if desired. For the typical specifications on rise/fall time, see ELECTRICAL
CHARACTERISTICS
INT
The INT line is an open-drain, 3.3V tolerant, LVCMOS active-low output. The INT lines from multiple
DS125DF410s can be wired together and connected to an external controller.
The Horizontal Eye Opening/Vertical Eye Opening (HEO/VEO) interrupt can be enabled using SMBus control for
each channel independently. This interrupt is disabled by default. The thresholds for horizontal and vertical eye
opening that will trigger the interrupt can be set using the SMBus control for each channel.
If any interrupt occurs, registers in the DS125DF410 latch in information about the event that caused the
interrupt. This can then be read out by the controller over the SMBus.
LOCK_3, LOCK_2, LOCK_1, and LOCK_0
Each channel of the DS125DF410 has an independent lock indication pin. These lock indication pins, LOCK_3,
LOCK_2, LOCK_1, and LOCK_0, are pin 16, pin 21, pin 40, and pin 45 respectively. These pins are shared with
the SMBus address strap lines. After the address values have been latched in on power-up, these lines revert to
their lock indication function.
When the corresponding channel of the DS125DF410 is locked to the incoming data stream, the lock indication
pin goes high. This pin can be used to drive an LED on the board, giving a visual indication of the lock status, or
it can be connected to other circuitry which can interpret the lock status of the channel.
DEVICE CONFIGURATION MODES
The DS125DF410 can be configured using two different methods.
• SMBus Master Configuration Mode
• SMBus Slave Configuration Mode
The configuration mode is selected by the state of the SMBus Enable pin (pin 20) when the DS125DF410 is
powered-up. This pin should be either left floating or tied to the device V_DD through an optional 1KΩ resistor. The
effect of each of these settings is shown in Table 3.
Pin Setting
Float
High (1)
Table 3. SMBus Enable Settings
Configuration Mode
SMBus Master Mode
SMBus Slave Mode
Description
READ_EN Pin
Device reads its configuration
from an external EEPROM on
power-up.
Pull low to initiate reading
configuration data from external
EEPROM
Device is configured over the
Tie low to enable proper address
SMBus by an external controller. strapping on power-up
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