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71M6403 Datasheet, PDF (60/75 Pages) Teridian Semiconductor Corporation – Electronic Trip Unit
71M6403
Electronic Trip Unit
SEPTEMBER 2006
Input Configuration
The input sensor type and its gain can be set for each current input using the configuration registers 0x28 thru 0x2D, as listed in
the table below (bits labeled “X” are “don’t care”):
Bit
Address Channel
7
6
5
4
3
2
1
0
0x28
I0
X
X
X
X
X
X
CT/ROG GAIN
0x29
I1
X
X
X
X
X
X
CT/ROG GAIN
0x2A
I2
X
X
X
X
X
X
CT/ROG GAIN
0x2B
I3
X
X
X
X
X
X
CT/ROG GAIN
0x2C
I4
X
X
X
X
X
I4SUM CT/ROG GAIN
0x2D
I5
X
X
X
X
X
X
CT/ROG GAIN
By setting bit 0 = 1, a gain of 8 is applied to the input raw signal associated with the configuration register. When bit 1 is set to 1,
the compute engine will process the input signal as a signal from a Rogowski coil sensor.
Example: When 0x03 is written to the configuration register at address 0x29, the I1_RAW input signal is processed with a gain
of 8 and is also integrated, assuming that it is generated by a Rogowski coil current sensor.
The processing for I4 can be selected to implement either a regular current input (I4SUM = 0) or to calculate a vectorial sum of
inputs I0, I1, I2, and I3 (I4SUM = 1). When I4SUM is set to 1, all other configuration bits for I4 are ignored. Likewise, the CE
ignores the I4SUM bit for all channels other than I4.
The NB (narrow-band) register (0x2E) allows control of the band-pass filtering for fundamental components in the channels I4
and I5. When NB is set to 1, the narrow-band filter is activated:
Bit
7
6
5
4
3
2
1
0
Function
X
X
X
X
X
X
X
NB
Accumulation Strobe Output
Since circuit breaker applications tend to have very short accumulation intervals, the CE supports signaling the end of the
accumulation interval by a strobe on the DIO6 pin.
This can be used for generating a hardware interrupt. If a hardware interrupt is desired, DIO6 should be configured as an output,
and the associated DIO_Rx register in I/O RAM should be used to associate an interrupt source with the pin.
The CE generates a low-going strobe of 397µs at the end of each accumulation interval. The control register for the
accumulation interval is STR_CNT (address 0x31). This register has a resolution of 397 microseconds. The accumulation
interval is controlled by STR_CNT as follows:
Accumulation interval = (STR_CNT + 1) * 397µs
Example: When STR_CNT is set to (decimal) 12, the accumulation interval will be 5.1 ms.
The processed data is available in the following registers.
Page: 60 of 75
© 2006 TERIDIAN Semiconductor Corporation
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