71M6403 Datasheet, PDF (51/75 Pages) Teridian Semiconductor Corporation – Electronic Trip Unit

71M6403
Electronic Trip Unit
SEPTEMBER 2006
RTM0
RTM1
RTM2
RTM3
2060
2061
2062
2063
SSI 2070
S S I _ B E G 2071
SSI_END 2072
SSI_EN
TRIMSEL 20FD
TRIM 20FF
SSI_10M
RTM Probes:
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
Synchronous Serial Interface:
SSI_CKGATE
SSI_FSIZE[1:0]
SSI_BEG[7:0]
SSI_END[7:0]
Fuse Selection Registers:
TRIMSEL[7:0]
TRIM[7:0]
SSI_FPOL SSI_RDYEN SSI_RDYPOL
SFR MAP (SFRs Specific to TERIDIAN 80515) – In Numerical Order
‘Not Used’ bits are blacked out and contain no memory and are read by the MPU as zero. RESERVED bits are in use and
should not be changed. This table lists only the SFR registers that are not generic 8051 SFR registers.
Name
SFR
Addr
Bit 7
P0
80
DIR0 A2
P1
90
DIR1 91
P2
A0
DIR2 A1
INTBITS F8
WDI
E8
WD_RST
ERASE 94
FLSHCTL B2
PGADR B7
PREBOOT
EEDATA 9E
EECTRL 9F
Bit 6
INT6
SECURE
Bit 5
Bit 4
Digital I/O:
Bit 3
Interrupts and WD Timer:
INT5
INT4
INT3
Flash:
FLSH_ERASE[7:0]
FLSH_PGADR[6:0]
Serial EEPROM:
EEDATA[7:0]
EECTRL[7:0]
Bit 2
Bit 1
Bit 0
DIO_0[7:0]
DIO_DIR0[7:0]
DIO_1[7:0]
DIO_DIR1[7:0]
DIO_2[5:0]
DIO_DIR2[5:0]
(Port 0)
(Port 1)
(Port 2)
INT2
INT1
IE_ZP8
INT0
IE_XFER
FLSH_MEEN FLSH_PWE
Page: 51 of 75
© 2006 TERIDIAN Semiconductor Corporation
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