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71M6403 Datasheet, PDF (10/75 Pages) Teridian Semiconductor Corporation – Electronic Trip Unit
71M6403
Electronic Trip Unit
SEPTEMBER 2006
The general topology of a chopped amplifier is given in Figure 2.
Vinp
A
B
Vinn
A
B
CROSS
+
A
G
B
-
A
B
Voutp
Voutn
Figure 2: General Topology of a Chopped Amplifier
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as controlled by CROSS in the
“A” position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the “B” position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the output as positive and
negative, which results in the offset effectively being eliminated, regardless of its polarity or magnitude.
The Functional Description Section contains a chapter with a detailed description on controlling the CHOP_ENA register.
Temperature Sensor
The 71M6403 includes an on-chip temperature sensor implemented as a bandgap reference. It is used to determine the die
temperature. The MPU may request an alternate multiplexer cycle containing the temperature sensor output by asserting
MUX_ALT.
Reading the internal temperature sensor requires enabling the alternate multiplexer cycle. The alternate multiplexer cycle then
displaces a normal I0-I5 current sensors acquisition cycle. Therefore, detection of an over current event may be delayed.
INEUTRAL
INEUTRAL is an analog monitor input that can be used for additional analog measurements, such as neutral current. It is
sampled when the multiplexer performs an alternate multiplexer cycle. The zero reference for the INEUTRAL input is VBIAS.
INEUTRAL is also routed into the comparator block where it is compared to VBIAS. External interrupt 2 should be disabled when
the INEUTRAL input is used for analog measurements.
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© 2006 TERIDIAN Semiconductor Corporation
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