71M6403 Datasheet, PDF (22/75 Pages) Teridian Semiconductor Corporation – Electronic Trip Unit

71M6403
Electronic Trip Unit
SEPTEMBER 2006
Serial Interface 0 Control Register (S0CON).
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON.
MSB
LSB
SM0
SM1 SM20 REN0 TB80 RB80
TI0
RI0
Table 13: The S0CON Register
Serial Interface 1 Control Register (S1CON).
The function of the serial port depends on the setting of the Serial Port Control Register S1CON.
MSB
LSB
SM
-
SM21 REN1 TB81 RB81
TI1
RI1
Table 14: The S1CON register
Bit
Symbol
S0CON.7
SM0
S0CON.6
SM1
S0CON.5
S0CON.4
S0CON.3
SM20
REN0
TB80
S0CON.2
RB80
S0CON.1
TI0
S0CON.0
RI0
Function
These two bits set the UART0 mode:
Mode
Description
SM0
0
N/A
0
SM1
0
1
8-bit UART
0
1
2
9-bit UART
1
0
3
9-bit UART
1
1
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9^th transmitted data bit in Modes 2 and 3. Set or cleared by the
MPU, depending on the function it performs (parity check, multiprocessor
communication etc.)
In Modes 2 and 3 it is the 9^th data bit received. In Mode 1, if SM20 is 0,
RB80 is the stop bit. In Mode 0 this bit is not used. Must be cleared by
software.
Transmit interrupt flag, set by hardware after completion of a serial
transfer. Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial
reception. Must be cleared by software.
Table 15: The S0CON Bit Functions
Page: 22 of 75
© 2006 TERIDIAN Semiconductor Corporation
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