71M6403 Datasheet, PDF (54/75 Pages) Teridian Semiconductor Corporation – Electronic Trip Unit

71M6403
Electronic Trip Unit
SEPTEMBER 2006
FLSH_PWE
Reserved
IE_ZP8
INTBITS
LCD_BSTEN
LCD_CLK[1:0]
LCD_EN
LCD_FS[4:0]
LCD_MODE[2:0]
SFR B2[0]
SFR E8[0]
SFR E8[1]
SFR F8[6:0]
2020[7]
2021[1:0]
2021[5]
2022[4:0]
2021[4:2]
R/W Program Write Enable
0 – MOVX commands refer to XRAM Space, normal operation
(default).
1 – MOVX @DPTR,A moves A to Program Space (Flash) @ DPTR.
This bit is automatically reset after each byte written to flash. Writes to
this bit are inhibited when interrupts are enabled.
R/W Interrupt flags. These flags are part of the WDI SFR register and mo-
nitor the ZP8 interrupt. The flags are set by hardware and must be
cleared by the interrupt handler.
R
Interrupt inputs. The MPU may read these bits to see the input to
external interrupts INT0, INT1, up to INT6. These bits do not have any
memory and are primarily intended for debug use.
R/W Enables the LCD voltage boost circuit.
R/W Sets the LCD clock frequency for COM/SEG pins (not the frame rate).
Note: f_w = CKFIR/128
00: f_w/2⁹, 01: f_w/2⁸, 10: f_w/2⁷, 11: f_w/2⁶
R/W Enables the LCD display. When disabled, VLC2, VLC1, and VLC0 are
ground as are the COM and SEG outputs.
R/W Controls the LCD full scale voltage, VLC2:
VLC
2
=
VLCD
⋅
(0.7
+
0.3
LCD _
31
FS
)
R/W The LCD bias mode.
000: 4 states, 1/3 bias
001: 3 states, 1/3 bias
010: 2 states, ½ bias
011: 3 states, ½ bias
100: static display
Page: 54 of 75
© 2006 TERIDIAN Semiconductor Corporation
REV 1.0