STE2004 Datasheet, PDF (7/66 Pages) STMicroelectronics – 102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER

Figure 4. Master Slave Logic Connection with frame Synchronization
STE2004
STE2004
VDD1AUX OSCIN FRIN OSCOUT FROUT
STE2004
FRIN OSCIN
OSCOUT FROUT
LR0219
Figure 5. Master Slave Logic Connection without frame Synchronization
STE2004
VDD1AUX OSCIN FRIN OSCOUT FROUT
STE2004
OSCIN
OSCOUT FROUT
VDD1AUX
FRIN
LR0220
3.5 Bias Levels
To properly drive the LCD, six (Including VLCD and VSS) different voltage (Bias) levels are generated.
The ratios among these levels and VLCD, should be selected according to the MUX ratio (m). They are
established to be (Fig. 6):
V_LCD,
n_-----+-----3_--
n+4
V_L
C
D
,
n_-----+-----2_--
n+4
V_L
C
D
,
-----²-------
n+4
V_L
C
D
,
-----¹-------
n+4
V_LCD ,V_SS
Figure 6. Bias level Generator
R
V_LCD
n+3
n + 4 ^·VLCD
R
n+2
n + 4 ^·VLCD
nR
2
n + 4 ^·VLCD
R
1
n + 4 ^·VLCD
R
V_{SS D00IN1150}
thus providing an 1/(n+4) ratio, with n calculated from:
n= m – 3
For m = 65, n = 5 and an 1/9 ratio is set.
For m = 49, n =4 and an 1/8 ratio is set.
The STE2004 provides three bits (BS0, BS1, BS2) for programming the desired Bias Ratio as shown below:
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