STE2004 Datasheet, PDF (59/66 Pages) STMicroelectronics – 102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2004
Table 23 Electrical Characteristics (continued)
AC OPERATION (continued)
(VDD1 = 1.7 to 3.6 V; VDD2 = 1.75 to 4.5V; Vss1,2 = 0V; VLCD = 4.5 to 15 V; Tamb =-40 to 85°C; unless otherwise specified)
Symbol
Parameter
Test Condition
Min. Typ. Max. Unit
PARALLEL INTERFACE
T_CYC System Cycle Time
V_DD1 = 1.7V; Read & Write
125
ns
T_CLW Control Low Pulse Width (WR)
20
ns
T_CHW Control High Pulse Width (WR)
75
ns
T_CLR Control Low Pulse Width (RD)
40
ns
T_CHR Control High Pulse Width (RD)
55
ns
T_EWHW Enable High Pulse Width (Write)
60
ns
T_EWLW Enable Low Pulse Width (Write)
60
ns
T_EWHR Enable High Pulse Width (Read)
60
ns
T_EWLR Enable Low Pulse Width (Read)
60
ns
T_SU(A) Address Set-up Time
10
ns
T_H(A) Address Hold Time
10
ns
T_SU1 Data Set-Up Time
30
ns
T_H1 Data Hold Time
30
ns
T_SU2 Read Access Time
40
ns
T_H2 Output Disable Time
0
30
ns
Figure 73. 68000-series Parallel interface timing
D/C
R/W
CS
E
D0 to D7
(Write)
D0 to D7
(Read)
tSU(A)
tEWHR, tEWHW
tSU1
tSU2
tH(A)
tCYC
tEWLR, tEWLW
tH1
tH2
Figure 74. 8080-series parallel Interface timing
D/C
tSU(A)
CS
WR, RD
D0 to D7
(Write)
D0 to D7
(Read)
tCLR , tCLW
tSU1
tSU2
tH (A)
tCYC
tCHR , tCHW
tH1
tH2
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