STE2004 Datasheet, PDF (30/66 Pages) STMicroelectronics – 102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2004
Figure 37. 4-lines SPI Reading Sequence
READING SEQUENCE
Write a "00000000" Instruction
SDOUT Buffer becomes active (Low Impedence)
Source 8 pulses on SCLK and
1
Read the ID Number or the Status Byte On SDOUT
SDOUT Buffer Configured in High Impedence
END OF READING SEQUENCE
note: 1) these data are not read by the display Diver
2) SDIN and SDOUT can be short circuited if the processor can configure
serial output buffers in high impedence during data read.
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4.2.2 3-lines SPI Interface
The STE2004 3-lines serial Interface is a bidirectional link between the display driver and the application
supervisor.
It consists of three lines: one/two for data signals (SDIN,SDOUT), one for clock signals (SCLK) and one
for peripheral enable (CS).
If the R/W bit is set to logic 0 the STE2004 is set to be a receiver. One or more command word follows to
define the status of the device.
A command word is composed by two bytes. The first is a control byte which defines Co, D/C, R/W H[1;0]
and HE values, the second is a data byte (fig 39). The Co bit is the command MSB and defines if after this
command will follow one data byte and an other command word or if will follow a stream of Commands or
a Steam of DDRAM Data (Co = 1 Command word, Co = 0 Stream of data). The D/C bit defines whether
the data byte is a command or DDRAM data (D/C = 1 RAM Data, D/C = 0 Command). The H[1;0] bits
define the instruction Set Page if HE bit =1. If HE bit is set to 0 H[1;0] values are neglected and it is possible
to update the instruction set page number using only the related instruction in the instruction Set.
If Co =1 and D/C = 0 the incoming data byte is decoded as a command, and if Co =1 and D/C =1, the
following data byte will be stored in the data RAM at the location specified by the data pointer.
After the last control byte, if D/C is set to a logic 1 the incoming data bytes are stored inside the STE2004
Display Data RAM starting at the address specified by the data pointer. The data pointer is automatically
updated after every byte written and in the end points to the last RAM location written.
Throughout SDOUT can be read the driver I²C slave address or the status Byte. The Command sequence
that allows to read I²C slave address or the Status byte is reported in Fig. 39 & 40.
If the R bit is set to logic 0 and D/C=0, the I²C slave address is read; If the R bit is set to logic 1 and D/
C=0, the the I²C slave address is read
SDOUT is in High impedance in steady state and during data write.
It is possible to short circuit SDOUT and SDIN and read I²C address or status byte without any additional
line.
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