STE2004 Datasheet, PDF (34/66 Pages) STMicroelectronics – 102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2004
4.3 Parallel Interface
The STE2004 selectable parallel Interfaces are 68000-series and 8080-series. They are both an 8-bits bi-
directional link between the display driver and the application supervisor.
Throughout both parallel interfaces can be read the I²C driver slave address or the Status Byte.
4.3.1 68000-series parallel interface
If CS is low after the positive edge of RES, the 68000 parallel interface is ready to receive or transmit data.
While CS pin is high the 68000 Parallel interface is kept in reset.
4.3.2 Write Mode
If R/W line is set to 0 Data are latched on E falling edge.
4.3.3 Read Mode
When R/W line is set to 1, data are output on D0-D7 bus on E rising edge. Data Bus is set in high imped-
ance mode when E is set to logic 0.
Accordingly to R bit value I2C Address or Status Byte is output on D0-D7 bus.
Figure 45. 68000-series Parallel interface protocol - one byte transmission
CS
R/W
D/C
E
D0
to
D7
LR0004
Figure 46. 68000-series Parallel interface bus protocol - Several bytes transmission
CS
R/W
D/C
E
D0
to
D7
LR0081
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