LSM330D Datasheet, PDF (60/66 Pages) STMicroelectronics – Low power mode

Register descriptions
LSM330D
Table 96. INT1_SRC_G description
Interrupt active. Default value: 0
IA
(0: no interrupt has been generated; 1: one or more interrupts have been generated)
ZH
Z high. Default value: 0 (0: no interrupt, 1: Z High event has occurred)
ZL
Z low. Default value: 0 (0: no interrupt; 1: Z Low event has occurred)
YH
Y high. Default value: 0 (0: no interrupt, 1: Y High event has occurred)
YL
Y low. Default value: 0 (0: no interrupt, 1: Y Low event has occurred)
XH
X high. Default value: 0 (0: no interrupt, 1: X High event has occurred)
XL
X low. Default value: 0 (0: no interrupt, 1: X Low event has occurred)
Interrupt source register. Read only register.
Reading at this address clears the INT1_SRC_G IA bit (and eventually the interrupt signal
on the INT1_G pin) and allows the refreshing of data in the INT1_SRC_G register if the
latched option was chosen.
8.42
INT1_THS_XH_G (32h)
Table 97. INT1_THS_XH_G register
-
THSX14 THSX13 THSX12 THSX11 THSX10
THSX9
THSX8
Table 98. INT1_THS_XH_G description
THSX14 - THSX9 Interrupt threshold. Default value: 0000 0000
8.43
INT1_THS_XL_G (33h)
Table 99. INT1_THS_XL_G register
THSX7 THSX6 THSX5 THSX4
THSX3
THSX2
THSX1
THSX0
Table 100. INT1_THS_XL_G description
THSX7 - THSX0 Interrupt threshold. Default value: 0000 0000
8.44
INT1_THS_YH _G (34h)
Table 101. INT1_THS_YH_G register
-
THSY14 THSY13 THSY12 THSY11 THSY10
THSY9
THSY8
60/66
Doc ID 022562 Rev 2