LSM330D Datasheet, PDF (59/66 Pages) STMicroelectronics – Low power mode

LSM330D
Table 92. FIFO_SRC_REG_G description (continued)
EMPTY
FIFO empty bit.
(0: FIFO not empty; 1: FIFO empty)
FSS4-FSS1
FIFO stored data level
Register descriptions
8.40 INT1_CFG_G (30h)
Table 93. INT1_CFG_G register
AND/OR
LIR
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
Table 94.
AND/OR
LIR
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
INT1_CFG_G description
AND/OR combination of interrupt events. Default value: 0
(0: OR combination of interrupt events 1: AND combination of interrupt events
Latch Interrupt request. Default value: 0
(0: interrupt request not latched; 1: interrupt request latched)
Cleared by reading INT1_SRC_G reg.
Enable interrupt generation on Z high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value higher
than preset threshold)
Enable interrupt generation on Z low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value lower than
preset threshold)
Enable interrupt generation on Y high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value higher
than preset threshold)
Enable interrupt generation on Y low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value lower than
preset threshold)
Enable interrupt generation on X high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value higher
than preset threshold)
Enable interrupt generation on X low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured value lower than
preset threshold)
Configuration register for interrupt source.
8.41 INT1_SRC_G (31h)
Table 95. INT1_SRC_G register
0
IA
ZH
ZL
YH
YL
XH
XL
Doc ID 022562 Rev 2
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