LSM330D Datasheet, PDF (16/66 Pages) STMicroelectronics – Low power mode

Module specifications
Figure 3. SPI slave timing diagram^(c)(d)
CS ₍₃₎
SPC (3)
t_su(CS)
SDI (3)
SDO (3)
t_c(SPC)
t_su(SI)
t_h(SI)
MSB IN
t_v(SO)
MSB OUT
t_h(SO)
LSM330D
(3)
t_h(CS)
(3)
LSB IN
(3)
t_dis(SO)
LSB OUT
(3)
3. Data on CS, SPC, SDI and SDO refer to pins: CS_A, CS_G, SCL_A/G, SDA_A/G, SDO_A / SDO_G.
2.4.2
I²C - inter IC control interface
Subject to general operating conditions for Vdd and T_OP.
Table 7. I²C slave timing values
Symbol
Parameter⁽¹⁾
f_(SCL)
t_w(SCLL)
t_w(SCLH)
t_su(SDA)
t_h(SDA)
SCL clock frequency
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
t_r(SDA) t_r(SCL) SDA and SCL rise time
t_f(SDA) t_f(SCL) SDA and SCL fall time
t_h(ST)
t_su(SR)
t_su(SP)
t_w(SP:SR)
START condition hold time
Repeated START condition
setup time
STOP condition setup time
Bus free time between STOP
and START condition
1. SCL (SCL_A/G pin), SDA (SDA_A/G pin)
2. Cb = total capacitance of one bus line, in pF
I²C standard mode ⁽¹⁾
Min
Max
0
100
4.7
4.0
250
0
3.45
1000
300
4
I²C fast mode ⁽¹⁾
Min
Max
0
400
1.3
0.6
100
0
0.9
20 + 0.1C_b ⁽²⁾
300
20 + 0.1C_b ⁽²⁾
300
0.6
4.7
0.6
4
0.6
4.7
1.3
Unit
KHz
µs
ns
µs
ns
µs
c. The SDO_A output line features an internal pull-up.
d. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.
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Doc ID 022562 Rev 2