LSM330D Datasheet, PDF (39/66 Pages) STMicroelectronics – Low power mode

LSM330D
7
Register mapping
Register mapping
The table below provides a listing of the 8-bit registers embedded in the device, and their
related addresses:
Table 18. Register address map
Name
Slave
address
Type
Reserved (do not modify) Table 16
CTRL_REG1_A
Table 16 rw
CTRL_REG2_A
Table 16 rw
CTRL_REG3_A
Table 16 rw
CTRL_REG4_A
Table 16 rw
CTRL_REG5_A
Table 16 rw
CTRL_REG6_A
Table 16 rw
REFERENCE_A
Table 16 rw
STATUS_REG_A
Table 16 r
OUT_X_L_A
Table 16 r
OUT_X_H_A
Table 16 r
OUT_Y_L_A
Table 16 r
OUT_Y_H_A
Table 16 r
OUT_Z_L_A
Table 16 r
OUT_Z_H_A
Table 16 r
FIFO_CTRL_REG
Table 16 rw
FIFO_SRC_REG
Table 16 r
INT1_CFG_A
Table 16 rw
INT1_SOURCE_A
Table 16 r
INT1_THS_A
Table 16 rw
INT1_DURATION_A
Table 16 rw
INT2_CFG_A
Table 16 rw
INT2_SOURCE_A
Table 16 r
INT2_THS_A
Table 16 rw
INT2_DURATION_A
Table 16 rw
CLICK_CFG_A
Table 16 rw
CLICK_SRC_A
Table 16 rw
CLICK_THS_A
Table 16 rw
TIME_LIMIT_A
Table 16 rw
Register address
Hex
00 - 1F
20
21
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
Binary
010 0000
010 0001
010 0010
010 0011
010 0100
010 0101
010 0110
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
Default
Comment
00000111
00000000
00000000
00000000
00000000
00000000
00000000
Output
Output
Output
Output
Output
Output
Output
00000000
Output
00000000
Output
00000000
00000000
00000000
Output
00000000
00000000
00000000
Output
00000000
00000000
Reserved
Doc ID 022562 Rev 2
39/66