VS6663CC Datasheet, PDF (39/63 Pages) STMicroelectronics – 1.3 megapixel camera module

VS6663CC
x_addr_min, y_addr_min
Figure 14. Analog crop
x_addr_start, y_addr_start
Addressed
pixel array region
Video timing
x_addr_min = 0
y_addr_min = 0
x_addr_max = 1295
y_addr_max = 975
6.1.2
x_addr_end, y_addr_end
x_addr_max, y_addr_max
The host must ensure the following rules are kept:
• the end address must be greater than the start address
• the x and y start addresses are restricted to even numbers only, and the x and y end
addresses are restricted to odd numbers only, to ensure that there is always a even
number of pixels read-out
Binning
The VS6663CC also has a binning mode that offers a reduced size full field of view image.
The binning mode averages row and column pixel data.
The binning mode results in a reduced number of lines and so can be used to give a higher
image frame rate. Compared to subsampling, binning makes use of the light gathered from
the whole pixel array and it results in higher image quality.
The binning mode will scale by 2x2 in the X and Y direction. Entering and exiting binning
mode may or may not be performed when the sensor is in software standby.
Table 23 summarizes the register setting for enabling binning mode. (The x/y_odd_inc
registers are automatically set and do not require to be set by the user.)
Register
binning_mode
Table 23. Binning register settings
Address
Normal
0x0900
0
Binning 2x2
1
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