VS6663CC Datasheet, PDF (12/63 Pages) STMicroelectronics – 1.3 megapixel camera module

Functional description
3
Functional description
VS6663CC
3.1
3.1.1
External clock
Clock input type
The external clock provided by the host to the VS6663CC must be a DC coupled square
wave and may also be RC-filtered.
Figure 5. Clock input types
Host processor
Pad
pwrdn
Host processor
Pad
pwrdn
Pad
extclk
Camera module
Extclk
pwrdn
1st option
DC-coupled
Pad
extclk
Camera module
Extclk
2nd option
pwrdn DC-coupled
and filtered
3.1.2
PLL and clock input
The VS6663CC has an embedded PLL block. This block generates all necessary internal
clocks from an input range defined in Table 5.
Table 5. System input clock frequency range
Minimum (MHz)
Maximum (MHz)
6
27
The value of the external clock frequency must be written to register 0x0136
(extclk_frequency_mhz).
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