LPS35HW Datasheet, PDF (34/48 Pages) STMicroelectronics – Embedded temperature compensation

Register description
LPS35HW
Once the additional low pass filter has been enable through the EN_LPFP bit, it is possible
to configure the device bandwidth acting on LPFP_CFG bit. Refer to Table 20: "Low-pass
filter configurations".
EN_LPFP
Table 20: Low-pass filter configurations
LPFP_CFG
Additional low pass filter status
Device bandwidth
0
x
Disabled
ODR/2
1
0
Enabled
ODR/9
1
1
Enabled
ODR/20
The BDU bit is used to inhibit the update of the output registers between the reading of
upper and lower register parts. In default mode (BDU = ‘0’), the lower and upper register
parts are updated continuously. When the BDU is activated (BDU = ‘1’), the content of the
output registers is not updated until PRESS_OUT_H is read, avoiding the reading of values
related to different samples.
8.6
CTRL_REG2 (11h)
Control register 2
7
6
5
4
3
2
1
0
BOOT FIFO_EN STOP_ON_FTH IF_ADD_INC I2C_DIS SWRESET 0^a ONE_SHOT
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BOOT
Reboot memory content. Default value: 0.
(0: normal mode; 1: reboot memory content). The bit is self-cleared when the
BOOT is completed.
FIFO_EN
FIFO enable. Default value: 0.(0: disable; 1: enable)
STOP_ON_FTH
Stop on FIFO threshold. Enable FIFO watermark level use. Default value 0 (0:
disable; 1: enable)
IF_ADD_INC
Register address automatically incremented during a multiple byte access with a
serial interface (I2C or SPI). Default value 1.
(0: disable; 1enable)
I2C_DIS
Disable I2C interface. Default value 0. (0: I2C enabled;1: I2C disabled)
SWRESET
Software reset. Default value: 0.
(0: normal mode; 1: software reset).
The bit is self-cleared when the reset is completed.
ONE_SHOT
One-shot enable. Default value: 0.
(0: idle mode; 1: anew dataset is acquired)
The BOOT bit is used to refresh the content of the internal registers stored in the Flash
memory block. At device power-up the content of the Flash memory block is transferred to
the internal registers related to the trimming functions to allow correct behavior of the
device itself. If for any reason the content of the trimming registers is modified, it is
sufficient to use this bit to restore the correct values. When the BOOT bit is set to ‘1’, the
content of the internal Flash is copied inside the corresponding internal registers and is
used to calibrate the device. These values are factory trimmed and they are different for
a _{This bit must be set to ‘0’ for proper operation of the device.}
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