LPS35HW Datasheet, PDF (33/48 Pages) STMicroelectronics – Embedded temperature compensation

LPS35HW
8.5
CTRL_REG1 (10h)
Register description
Control register 1
7
6
0^a
ODR2
5
ODR1
Table 18: CTRL_REG1 (10h) register
4
3
2
ODR0
EN_LPFP
LPFP_CFG
1
0
BDU
SIM
ODR [2:0]
Output data rate selection. Default value: 000 Refer to Table 19: "Output data rate bit
configurations".
EN_LPFP
Enable low-pass filter on pressure data. Default value: 0 (0: Low-pass filter disabled; 1:
Low-pass filter enabled)
LPFP_CFG
LPF_CFG: Low-pass configuration register. Default value:0 Refer to Table 20: "Low-
pass filter configurations".
BDU^b
Block data update. Default value: 0 (0: continuous update;
1:output registers not updated until MSB and LSB have been read)
SIM
SPI Serial Interface Mode selection. Default value: 0(0: 4-wire interface; 1: 3-wire
interface)
ODR2
0
0
0
0
1
1
ODR1
0
0
1
1
0
0
Table 19: Output data rate bit configurations
ODR0
Pressure (Hz)
Temperature (Hz)
0
Power down / One shot mode enabled
1
1 Hz
1 Hz
0
10 Hz
10 Hz
1
25 Hz
25 Hz
0
50 Hz
50 Hz
1
75 Hz
75 Hz
When ODR bits are set to '000' the device is in Power down mode. When the device is in
power-down mode, almost all internal blocks of the device are switched off to minimize
power consumption. I²C interface is still active to allow communication with the device. The
configuration registers content is preserved and output data registers are not updated,
therefore keeping the last data sampled in memory before going into power- down mode.
If ONE_SHOT bit in CTRL_REG2(11h) is set to '1', One-shot mode is triggered and a new
acquisition starts when it is required. This enabling is effective only if the device was
previously in power-down mode (ODR bits set to '000'). Once the acquisition is completed
and the output registers updated, the device automatically enters in power down mode.
ONE_SHOT bit self-clears itself.
When ODR bits are set to a value different than '000', the device is in Continuous mode
and automatically acquires a set of data (pressure and temperature) at the frequency
selected through ODR[2,0] bits.
a _{This bit must be set to ‘0’ for proper operation of the device}
b _{To guarantee the correct behavior of BDU feature, th PRESS_OUT_H (2Ah) must be the last address read.}
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