LAN91C100 Datasheet, PDF (9/101 Pages) SMSC Corporation – FEAST™ Fast Ethernet Controller

DESCRIPTION OF PIN FUNCTIONSOF PIN FUNCTIONSPIN FUNCTIONS
PQFP/TQFP
PIN NO.
NAME
SYMBOL
1
nLink Status nLNK
BUFFER
TYPE
IP
DESCRIPTION
Input. General purpose input port used to
convey LINK status (EPHSR bit 14).
Independent of port selection (MIISEL=X).
195
nFullstep nFSTEP
O4 Output. Non volatile output pin. Driven by
inverse of FULLSTEP (CONFIG bit 10).
Independent of port selection (MII SEL=X).
6
MII Select MIISEL
O4 Output. Non volatile output pin. Driven by
MII SELECT (CONFIG bit 15). High
indicates the MII port is selected, low
indicates the 10 Mbps ENDEC is selected.
194
AUI Select AUISEL
O4 Output. Non volatile output pin. Driven by
AUI SELECT (CONFIG bit 8). Independent
of port selection (MIISEL=X).
30
Transmit TXEN100
Enable 100
Mbps
O4 Output to MII PHY. Envelope to 100 Mbps
transmission. This pin stays low if MIISEL is
low.
19
Carrier 100 CRS100
Mbps
IP
Input from MII PHY. Envelope of packet
reception used for deferral and backoff
purposes. This pin is ignored when MIISEL
is low.
12
Receive
RX_DV
Data Valid
ID
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing.
This pin is ignored when MIISEL is low.
18
Collision COL100
Detect 100
Mbps
ID
Input from MII PHY. Collision detection
input. This pin is ignored when MIISEL is
low.
25,26, Transmit
TXD0-TXD3
O4
Outputs. Transmit Data nibble to MII PHY.
28,29 Data
9
Transmit TX25
Clock
IP
Input. Transmit clock input from MII. Nibble
rate clock (25 MHz). This pin is ignored
when MIISEL is low.
17
Receive
RX25
Clock
IP
Input. Receive clock input from MII PHY.
Nibble rate clock. This pin is ignored when
MIISEL is low.
20,21,
22,24
Receive
Data
RXD0-
RXD3
I
Inputs. Received Data nibble from MII PHY.
These pins are ignored when MIISEL is low.
9