LAN91C100 Datasheet, PDF (85/101 Pages) SMSC Corporation – FEAST™ Fast Ethernet Controller

FIGURE 15 - ASYNCHRONOUS CYCLE - nADS = 0
(nDATACS Used to Select Data Register; Must Be 32 Bit Access)
t2
nDATACS
nADS
READ DATA
t3
t4
nRD, nWR
t1
WRITE DATA
PARAMETER
t5
D0-D31 valid
MIN
t1 A1-A15, AEN, nBE0-nBE3 Valid and nADS Low Setup 25
to nRD, nWR Active
t2 A1-A15, AEN, nBE0-nBE3 Hold After nRD, nWR
20
Inactive (Assuming nADS Tied Low)
t3 nRD Low to Valid Data
t4 nRD High to Data Floating
t5 Data Setup to nWR Inactive
30
t5A Data Hold After nWR Inactive
5
t5A
TYP MAX
40
30
UNITS
ns
ns
ns
ns
ns
ns
74