LAN91C100 Datasheet, PDF (87/101 Pages) SMSC Corporation – FEAST™ Fast Ethernet Controller

FIGURE 17 - BURST READ CYCLES - nVLBUS = 1
LCLK
nDATACS
W/nR
READ DATA
nRDYRTN
t12
t17
t19
a
b
t15
t14
nCYCLE
PARAMETER
t12 nDATACS Setup to Either nCYCLE or W/nR Falling
t13 nDATACS Hold after Either nCYCLE or W/nR Rising
t14 nRDYRTN Setup to LCLK Falling
t15 nRDYRTN Hold after LCLK Falling
t17 nCYCLE High and W/nR High Overlap
t19 Data Delay from LCLK Rising (Read)
t13
c
t17
MIN TYP MAX UNITS
60
ns
30
ns
15
ns
2
ns
50
ns
5
38
ns
76