LAN91C100 Datasheet, PDF (83/101 Pages) SMSC Corporation – FEAST™ Fast Ethernet Controller

ADDRESS
nADS
READ DATA
nRD,nWR
WRITE DATA
TIMING DIAGRAMS
t2
A1-15, AEN,nBE0-nBE3 valid
t3
t4
t1
t5
t5A
D0-D31 valid
FIGURE 13 - ASYNCHRONOUS CYCLE - nADS = 0
PARAMETER
MIN
t1 A1-A15, AEN, nBE0-nBE3 Valid and nADS Low Setup 25
to nRD, nWR Active
t2 A1-A15, AEN, nBE0-nBE3 Hold After nRD, nWR
20
Inactive (Assuming nADS Tied Low)
t3 nRD Low to Valid Data
t4 nRD High to Data Floating
t5 Data Setup to nWR Inactive
30
t5A Data Hold After nWR Inactive
5
TYP MAX UNITS
ns
ns
40
ns
30
ns
ns
ns
72