COM20051I Datasheet, PDF (69/74 Pages) SMSC Corporation – Integrated Microcontroller and ARCNET (ANSI 878.1) Interface

ALE
nPSEN
nRD
PORT 0
PORT 2
t1
t2
t3
t6
t13
t5
t9
t8
t12
A0 - A7
t7
DATA IN
A8 - A15 FROM DPH
t4
t11
t10
P a ra me te r
t1 ALE Pulse Width
t2 ALE Low to Valid Data In
t3 ALE Low to nRD or nWR Low
t4 nRD or nWR High to ALE High
t5 nRD Pulse Width
t6 Address Valid to ALE Low
t7 Address to Valid Data In
t8 nRD Low to Address Float
t9 nRD Low to Valid Data In
t10 Data Hold after nRD
t11 Data Float after nRD
t12 Address Valid to nRD or nWR Low
t13 Address Hold after ALE Low
min
typ max units
85
137.5
22.5
275
7
0
120
27
nS
350
nS
238.5 nS
102.5 nS
nS
nS
397.5 nS
0
nS
147.5 nS
nS
55
nS
nS
nS
FIGURE 25 – EXTERNAL DATA MEMORY READ CYCLE
SMSC DS – COM20051I
Page 69
Rev. 03/27/2000