COM20051I Datasheet, PDF (10/74 Pages) SMSC Corporation – Integrated Microcontroller and ARCNET (ANSI 878.1) Interface

FFFFh
256 BYTES
64K
BYTES
ARCNET CORE
ADDRESS DECODE
REGISTER
(FIXED LOCATION)
VALUE x 100h
PAGE
LOCATION CAN
VARY
0000h
FIGURE 2 – COM20051I EXTERNAL DATA ADDRESS SPACE
NAME
ADR DEC
BIT 7
A15
ADDRESS DECODE REGISTER
BIT 6 BIT 5 BIT 4 BIT 3
A14
A13
A12
A11
BIT 2
A10
BIT 1
A9
BIT 0
A8
LOCATION: FFFFh of the External Data Memory space. Default: 00h
EXAMPLE:
Address Decode Register = 80h
ARCNET core registers will be located at 8000h + Register offset (e.g. ARCNET
Configuration Register offset = 06h, physical address = 8006h).
SMSC DS – COM20051I
Page 10
Rev. 03/27/2000