COM20051I Datasheet, PDF (51/74 Pages) SMSC Corporation – Integrated Microcontroller and ARCNET (ANSI 878.1) Interface

S TA R T
IN IT IA L IZ E 8 0 5 1
P E R IP H E R A L S
EXTERNAL RAM
TEST
PRO G RAM
ARCNET
D EC O D E
ARCNET
RAM TEST
IN IT IA L IZ E
ARCNET
CORE
F IN D
N O D E ID
T X IS R
R X IS R
E X E C U T E M A IN
TA S K
END
FIGURE 17 – TYPICAL PROGRAM EXECUTION
Receive Interrupt
A basic Receive service routine is shown in the flowchart of Figure 19. The basic concept of the service routine is not
to process the packet data but to remove the packet from the ARCNET buffer and free the buffer for another
reception. This method will minimize the number of missed packets due to unavailable buffers.
The Receiver Interrupt Service Routine (RX_ISR) will handle one reception at a time and enable another receive
command upon exiting the service routine. Received data is stored in one of four buffers in external RAM. Several
variables are kept in order to facilitate processing. RAM_BUF_REG is a byte wide, bit mapped software register
which shows which external buffers are empty so that new data can be copied. RX_PAGE_REG is a byte wide
register in which the lower nibble contains the ARCNET buffer RAM page address in which the latest reception can
be found. The upper nibble contains the page address in which the next received is to be stored. This register allows
SMSC DS – COM20051I
Page 51
Rev. 03/27/2000